The 74LVX138 is a low voltage CMOS 3 TO 8 LINE DECODER (INVERTING) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power, battery operated and low noise 3.3V applications. If the device is enabled, 3 binary select (A, B, and C) determine which one of the outputs will go low. If enable input G1 is held low or either G2A or G2B is held high, the decoding function is inhibited and all the 8 outputs go to high. Three enable inputs are provided to ease cascade connection and application of address decoders for memory systems. Power down protection is provided on all inputs and 0 to 7V can be accepted on inputs with no regard to the supply voltage. This device can be used to interface 5V to 3V system. It combines high speed performance with the true CMOS low power consumption. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient ESD immunity.
The 74LVX138 is a low voltage CMOS 3-to-8 line decoder (inverting) fabricated with sub-micron silicon gate and double-layer metal wiring CMOS technology. It is designed for low power, battery-operated, and low noise 3.3V applications, combining high-speed performance with true CMOS low power consumption.
| Input Voltage | 0 to 5.5 V |
|---|---|
| Output Voltage | 0 to VCC V |
| Operating Temperature Range | -55 to 125 °C |
| Propagation Delay Time | 5.5 ns (TYP.) |
Yes, the device has 5V tolerant inputs and can accept 0 to 7V on inputs regardless of supply voltage.
It is a 3-to-8 line decoder (inverting) where 3 binary select inputs determine which of the 8 outputs will go low.