STMicroelectronics 74V1T126 Single Bus Buffer Datasheet


STMicroelectronics 74V1T126 Single Bus Buffer Datasheet - cover page
Brand
STMicroelectronics
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
9
File format
PDF
File size
56 KB
Published
10 August, 2012
Updated
29 September, 2023
MD5 checksum
F65333DE48992AFAB59F5DDB3438C214

About this manual

The 74V1T126 is an advanced high-speed CMOS single bus buffer fabricated with sub-micron silicon gate and double-layer metal wiring CMOS technology. It features a 3-state control input, powerdown protection on all inputs, and symmetrical output impedance. The device is designed to interface 5V logic to 3V logic levels.

What's inside

  • Description
  • Pin Connection
  • Truth Table
  • Absolute Maximum Ratings
  • DC Specifications
  • AC Electrical Characteristics
  • Mechanical Data

Specifications

High Speed Propagation Delay3.8ns (Typ.)
Low Power Dissipation1 W (Max)
Operating Voltage Range4.5V to 5.5V
Input Capacitance4 to 10 pF
Output Capacitance10 pF

Frequently asked questions

What is the function of the 3-state control input G?

The 3-state control input G must be set LOW to place the output into the high impedance state.

Can the 74V1T126 interface 5V to 3V logic?

Yes, the device can be used to interface 5V to 3V logic levels.

What is the maximum supply voltage?

The maximum supply voltage is +7.0 V.

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