The 74VHC138 is an advanced high-speed CMOS 3 TO 8 LINE DECODER (INVERTING) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology.
The 74VHC138 is an advanced high-speed CMOS 3-to-8 line decoder (inverting) fabricated with sub-micron silicon gate and double-layer metal wiring C7MOS technology. It features three enable inputs to ease cascade connection and application of address decoders for memory systems. The device provides power-down protection on all inputs, allowing 0 to 7V to be accepted on inputs regardless of the supply voltage, enabling interface between 5V and 3V systems.
| Propagation Delay (Typical) | 5.7ns |
|---|---|
| Power Dissipation (Max) | 4 mW |
| Noise Immunity (Min) | 28% Voc |
| Output Impedance (Min) | 8 mA |
| Operating Voltage Range | 2V to 5.5V |
| ESD Immunity | 2KV |
| Supply Voltage (Max) | +7.0 V |
| Operating Temperature Range | -55 to 125 °C |
It is a 3-to-8 line decoder (inverting) where 3 binary select inputs determine which of the 8 outputs goes low if the device is enabled.
Yes, it can be used to interface 5V to 3V because power-down protection allows 0 to 7V on inputs regardless of supply voltage.
The device is available in SOP and TSSOP packages.