Altera Stratix GX Transceiver User Guide

This document introduces the use of Altera Stratix GX Transceiver


Altera Stratix GX Transceiver User Guide - cover page
Brand
Stratix
Category
Other Electronics
Document type
User Manual
Language
English
Pages
318
File format
PDF
File size
7.9 MB
Published
09 August, 2012
Updated
30 September, 2023
MD5 checksum
D29C6AE9CF732C9C079B312475AEE253

About this manual

This document provides a comprehensive user guide for the Stratix GX transceiver blocks found in Altera FPGA devices. It details the block's capabilities, including support for frequencies from 500 Mbps to 3.1875 Gbps, and covers various modes of operation such as Basic Mode, SONET Mode, XAUI Mode, and GigE Mode. The guide explains the internal architecture, including analog and digital sections, serializers, deserializers, and clock recovery units.

What's inside

  • Introduction
  • Stratix GX Analog Description
  • Basic Mode
  • SONET Mode
  • XAUI Mode
  • GigE Mode
  • Loopback Modes
  • Built-In Self Test (BIST)
  • Reset Control & Power Down
  • Appendix: Data & Control Codes

Specifications

Supported Frequencies500 Mbps to 3.1875 Gbps
Channels per DeviceUp to 20 channels
Process Technology1.5-V, 0.13-µm, all-layer copper CMOS
I/O Standard1.5-V PCML

Frequently asked questions

What are the supported frequency ranges for the Stratix GX transceiver?

The transceiver supports frequencies from 500 Mbps to 3.1875 Gbps.

Does the Stratix GX transceiver include built-in self-test capability?

Yes, it includes built-in self-test (BIST) capability with embedded Pseudo Random Binary Sequence (PRBS) pattern generation and verification.

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