M24256-B and M24128-B are two 256/128Kbit I2C bus EEPROMs with three chip enable lines, compatible with I2C extended addressing, support 400kHz protocol, single supply voltage 4.5V to 5.5V, can perform byte and page write (up to 64 bytes), support random and sequential read modes, self-timed programming cycle, automatic address incrementing, enhanced ESD/Latch-Up behavior, 100000 erase/write cycles (minimum), 40 years of data retention (minimum).
This document is a preliminary data sheet describing the features, specifications, and operation of the M24256-B (32Kx8 bits) and M24128-B (16Kx8 bits) Serial I2C Bus EEPROMs. These devices are compatible with the I2C extended memory standard and utilize a two-wire serial interface supporting up to 400kHz protocols.
| Organization (M24256-B) | 32Kx8 bits |
|---|---|
| Organization (M24128-B) | 16Kx8 bits |
| Supply Voltage (Standard) | - 4.5V to 5.5V |
| Supply Voltage (Wide) | - 2.5V to 5.5V |
| Supply Voltage (Low Power) | - 1.8V to 3.6V |
| I2C Protocol Speed | Supports 400kHz |
| Erase/Write Cycles (min) | 100,000 |
| Data Retention (min) | 40 Years |
The device supports a two-wire serial interface that uses a bi-directional data bus and serial clock supporting up to 400kHz.
The memory supports a minimum of 100,000 erase/write cycles.
The device guarantees a minimum data retention of 40 years.