ST M24256-B M24128-B 256Kbit 128Kbit Serial I C Bus EEPROM With Three Chip Enable Lines handbook

This document introduces the features of 256Kbit and 128Kbit Serial I²C Bus EEPROM With Three Chip Enable Lines, including compatible with I2C Extended Addressing, Two Wire I2C Serial Interface Supports 400 kHz Protocol, Single Supply Voltage, Hardware Write Control, BYTE and PAGE WRITE, RANDOM and SEQUENTIAL READ Modes, Self-Timed Programming Cycle, Automatic Address Incrementing, Enhanced ESD/Latch-Up Behavior, More than 100,000 Erase/Write Cycles, More than 40 Year Data Retention

Brand: STMicroelectronics
Category: Memory
Document type: Datasheet
Language: English
Pages: 25
File format: PDF
File size: 169 KB
Published: 09 August, 2012
Updated: 30 September, 2023
Models: 256KBIT, 128KBIT, M24256-B, M24128-B, 56B
MD5 checksum: CFB361026D48979B1FB2673812C8C9DD
PDF: ST M24256-B M24128-B 256Kbit 128Kbit Serial I C Bus EEPROM With Three Chip Enable Lines handbook PDF

About this manual

The document describes two electrically erasable programmable memory (EEPROM) devices, the M24256-B organized as 32K x 8 bits and the M24128-B as 16K x 8 bits. These devices are compatible with the I²C memory protocol, utilizing a two-wire serial interface that supports up to 400 kHz protocols.

What's inside

Features Summary
Summary Description
Signal Description
I2C Bus Protocol
Device Operation
Operating Modes
Write Operations
Package Dimensions
Electrical Characteristics
Ordering Information

Frequently asked questions

What is the maximum frequency for the I²C protocol supported?

The device supports a 400 kHz Protocol.

How many erase/write cycles can the M24xxx-B series endure?

More than 1 Million Erase/Write cycles for the products specified in Table 22.

What is the data retention period?

The devices offer More than 40 Year Data Retention.

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