ST26C32AB CMOS Quad Differential Line Receiver Datasheet

The ST26C32AB is a ST company's CMOS quad 3-state differential line receiver. It features low power consumption, ±0.2V sensitivity, typical propagation delay of 19ns, typical input hysteresis of 60mV, meets EIA standard RS-422, RS-423 requirements, and can be used to connect system buses.


ST26C32AB CMOS Quad Differential Line Receiver Datasheet - cover page
Brand
STMicroelectronics
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
14
File format
PDF
File size
616 KB
Published
08 August, 2012
Updated
01 October, 2023
MD5 checksum
A7926939D792BDC16EFAA18AF233A8B5

About this manual

The ST26C32AB is a quad differential line receiver designed for balanced and unbalanced digital data transmission. It features an input sensitivity of 200 mV over the common mode input voltage range of +7 V, ensuring reliable signal reception in noisy environments.

The device includes internal pull-up and pull-down resistors to prevent output oscillation on unused channels and provides a 3-state output with enable/disable functions for all four receivers. It is available in DIP-16, SO-16, and TSSOP16 packages.

What's inside

  • Pin configuration
  • Maximum ratings
  • Electrical characteristics
  • Package mechanical data
  • Revision history

Specifications

Supply voltage (Recommended)4.5 to 5.5 V
Operating temperature range-40 to +85 °C
Input sensitivity200 mV
Propagation delay (Typical)19 ns
Input hysteresis (Typical)60 mV
Output current capability6 mA source and sink

Frequently asked questions

What standards does the ST26C32AB meet?

The device meets the requirements of EIA standard RS-422 and RS-423.

What are the available package types?

The ST26C32AB is available in DIP-16, SO-16 (tape and reel), and TSSOP 16 packages.

What is the maximum supply voltage?

The absolute maximum rating for the supply voltage is 7 V.

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