This application note explains the methods for managing the driver enable signal in RS-485 and IO-Link communications with the STM32™'s USART interface, as well as the timing measurements of the DE signal. The document is divided into three parts: it first explains the timing constraint of the DE signal, then describes the two methods used to manage the DE signal, and finally provides different measurements of the DE signal switching time using these methods.
This document addresses the critical timing requirements for the Driver Enable (DE) signal in half-duplex communication protocols like RS-485 and IO-Link. It details how the master device must switch the DE signal to ensure proper reception of slave responses without data collisions.
| Baud rate for transmission | 230400 baud |
|---|---|
| Stop bits | 1 stop bit |
| DE signal emulation pin | GPIO port C pin 6 (PC6) |
The examples support CPU frequencies of 72 MHz and 24 MHz.
The examples are built with Keil 4.00 and IAR 5.40.
The DE signal must switch from high to low within the bit time following the last bit of the last byte sent.