Analog Devices Using the NAND Flash Controller on Blackfin Processors EE-344

This document introduces the NAND Flash Controller on Blackfin® processors. The controller simplifies the memory interface design and allows external storage devices to be accessed for read and write operations.


Analog Devices Using the NAND Flash Controller on Blackfin Processors EE-344 - cover page
Brand
Analog Devices
Category
Other Electronics
Document type
Application Note
Language
English
Pages
10
File format
PDF
File size
2.5 MB
Published
03 August, 2012
Updated
01 October, 2023
MD5 checksum
B0A855F259AC962C9AB3844247FD4052

About this manual

This Engineer-to-Engineer Note discusses the on-chip NAND flash controller (NFC) found on ADSP-BF52x and ADSP-BF54x Blackfin processors. It explains how these processors simplify memory interface design for portable media devices by eliminating external glue logic and reducing software overhead.

The document provides details on implementing software drivers for block erase, page program, and page read operations. It also covers essential algorithms such as bad block management and wear leveling to extend the life of NAND flash devices, along with guidelines for using file systems like YAFFS.

What's inside

  • Introduction
  • Bad Block Management
  • Wear Leveling
  • NAND Flash File System
  • NAND Flash Drivers
  • Block Erase
  • Page Write

Frequently asked questions

What processor models does this application note cover?

This document discusses the NAND flash controller on ADSP-BF52x and ADSP-BF54x Blackfin processors.

What is the maximum number of program/erase cycles for NAND flash blocks?

The number of program/erase cycles will vary from 10,000 to 100,000 times before a block is no longer reliable.

What page sizes does the NAND flash controller support?

The controller supports SLC NAND flash devices with page sizes of 256 and 512 bytes, with larger sizes supported via software.

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