Fairchild Semiconductor AN-376 Logic-System Design Techniques Reduce Switching-CMOS Power Application Note

About this manual

This document is an application note from Fairchild Semiconductor published in August 1984 and revised in October 2002. It focuses on reducing power consumption in logic designs using high-speed CMOS integrated circuits, particularly the MM74HC logic family. The text explains that while these devices have near-zero quiescent power, their primary power drain comes from dynamic switching currents. The note provides guidelines for enhancing system efficiency, such as minimizing operating frequency and managing static DC current paths.

What's inside

• Logic-System Design Techniques
• Reduce Switching-CMOS Power
• MM74HC Logic Family
• Dynamic Switching Currents
• Quiescent Power
• Power-Dissipation-Capacitance (Cpp)
• Test Cpp in Realistic Situations
• Gates, Decoders, Multiplexers
• 3-STATE Buffers and Transceivers
• TTL-Compatible CMOS Logic

Frequently asked questions

How should unused inputs be handled when measuring Cpp?

Terminate all unused inputs to ground of the supply voltage.