Samsung KM684000LI/LI-L CMOS SRAM Datasheet


Samsung KM684000LI/LI-L CMOS SRAM Datasheet - cover page
Brand
Samsung
Category
Memory
Document type
Datasheet
Language
English
Pages
7
File format
PDF
File size
323 KB
Published
12 June, 2012
Updated
31 July, 2012
MD5 checksum
46B30CA8A9299A932C30A7B5EAFACF67

About this manual

This document is a datasheet for the Samsung KM684000LI/LI-L, a 4,194,304-bit high-speed CMOS Static Random Access Memory (SRAM) organized as 524,288 words by 8 bits. The device is fabricated using Samsung's advanced CMOS process and is designed for high-speed and low-power applications, particularly suitable for battery back-up nonvolatile memory applications.

What's inside

  • Features
  • Functional Block Diagram
  • Pin Configuration
  • Absolute Maximum Ratings
  • Recommended Operating Conditions
  • DC and Operating Characteristics
  • Capacitance
  • Timing Diagrams
  • Functional Description
  • Data Retention Characteristics

Specifications

Total Capacity4,194,304 bits
Access Time (Max)100 ns
Standby Power (Typ)11 mW
Operating Temperature-40°C to 85°C
Supply Voltage5V +10%
Input Capacitance8 pF

Frequently asked questions

What is the maximum access time for the KM684000LI/LI-L?

The maximum access time is 100 ns.

What is the minimum data retention voltage?

The minimum data retention voltage is 2V.

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