Update: 29 September, 2023
This is a 3-to-8 line decoder/demultiplexer designed for high-performance memory decoding or data routing applications requiring very short propagation delay time. It can be used in high-performance memory systems to minimize the effects of system decoding. When used with high-speed memories utilizing a fast enable circuit, the delay times of this decoder and the enable time of the memory are usually less than the typical access times of the memory. This means that the effective system delay introduced by the schottky-clamped system decoder is negligible.
File format: PDF
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MD5 Checksum: 7AB750A5235AB457492A5BEF80F0FFD6
Publication date: 08 June, 2012
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PDF Link: INTEQRAL IN74LS138 TECHNICAL DATA PDF