QuickLogic QL4016 QuickRAM Data Sheet

This data sheet provides detailed information on the performance, density, and embedded RAM features of the QuickLogic QL4016 QuickRAM ESP product.


QuickLogic QL4016 QuickRAM Data Sheet - cover page
Brand
Quick
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
18
File format
PDF
File size
169 KB
Published
08 June, 2012
Updated
30 September, 2023
MD5 checksum
EE66DBDA4DDED930037FD431E926A15F

About this manual

The QuickLogic QL4016 is a member of the QuickRAM family of Embedded Standard Products (ESPs), combining FPGA logic with Dual-Port SRAM modules. It features 16,000 usable PLD gates and 10 Dual Port RAM modules, each containing 1,152 bits, for a total of 11,520 bits. The device is fabricated on a 0.35 um four-layer metal non-volatile CMOS process using QuickLogic's patented ViaLink technology.

What's inside

  • Architecture Overview
  • Product Summary
  • Logic Cell Specifications
  • RAM Cell Timing
  • Input-Only and Clock Cells
  • I/O Cell Delays
  • DC Characteristics
  • Operating Range

Specifications

Usable PLD Gates16,000
I/O Pins118
Logic Cells320
RAM Modules10
Total RAM Bits11,520
RAM Block Size1,152 bits
Process Technology0.35 um four-layer metal

Frequently asked questions

What is the total capacity of the embedded RAM?

The device contains 10 Dual Port RAM modules with 1,152 bits each, totaling 11,520 bits.

What are the available RAM module configurations?

RAM modules can be configured into one of four modes: 64 x 18, 128 x 9, 256 x 4, or 512 x 2.

Is the QL4016 compatible with 3.3 V and 5.0 V buses?

Yes, it interfaces with both 3.3 V and 5.0 V devices and is PCI compliant for both voltage levels.

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