ICSI IS61C632A 32K x 32 Synchronous Pipelined Static RAM Datasheet

IS61C632A is a high-speed, low-power synchronous static RAM designed by ICSI company to provide a burstable, high-performance, secondary cache for the i486, Pentium, 680X0 and PowerPC microprocessors. It is organized as 32,768 words by 32 bits, fabricated with ICSI's advanced CMOS technology. The device integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability input/output circuits, with high speed, low power consumption and high reliability.


ICSI IS61C632A 32K x 32 Synchronous Pipelined Static RAM Datasheet - cover page
Brand
ICSI
Category
Memory
Document type
Datasheet
Language
English
Pages
16
File format
PDF
File size
486 KB
Published
05 June, 2012
Updated
01 October, 2023
MD5 checksum
A17569176734C541760A928783675875

About this manual

The ICSI IS61C632A is a high-speed, low-power synchronous static RAM organized as 32,768 words by 32 bits. It is fabricated with advanced CMOS technology and integrates a 2-bit burst counter, high-speed SRAM core, and high-drive capability outputs into a single monolithic circuit.

What's inside

  • Features
  • Description
  • Block Diagram
  • Pin Configuration
  • Truth Table
  • Absolute Maximum Ratings
  • Operating Range
  • DC Electrical Characteristics
  • AC Test Conditions

Specifications

Organization32,768 words by 32 bits
Access Time (4ns)125 MHz
Access Time (8ns)66 MHz
Power Supply Voltage+3.3V
Package Types100-Pin LQFP and PQFP
Operating Temperature (Commercial)0°C to +70°C

Frequently asked questions

What microprocessors is this RAM designed for?

It is designed to provide a burstable, high-performance secondary cache for the i486™, Pentium™, 680X0™, and PowerPC™ microprocessors.

How does the device enter power-down mode?

A HIGH input on the ZZ pin puts the SRAM in the power-down state.

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