The Motorola 6264C is a 65,536-bit static random access memory organized as 8192 words of 8 bits. Fabricated using Motorola's second-generation high-performance silicon-gate CMOS technology, it eliminates the need for external clocks or timing strobes and features active high and active low chip enable pins for system design flexibility.
The device is available in a 600 mil, 28-pin ceramic DIL package and a 32-terminal ceramic LCCC package. It operates with a single +5V power supply and offers access times ranging from 15 ns to 70 ns depending on the specific speed grade selected.
| Organization | 8K x 8 bits (65,536-bit) |
|---|---|
| Power Supply Voltage | +5.0V +/- 10% |
| Access Time Range | 15 to 70 ns |
| Power Dissipation | 825 mW |
The device is available with access times of 15, 20, 25, 35, 45, 55, and 70 ns.
No, it is fully static and does not require external clocks or timing strobes.
It is available in a 28-pin ceramic DIL and a 32-terminal ceramic LCCC package.