This product is a four-way T1 DS1/ISDN-PRI/J1 framing transceiver with independent transmit and receive functionality and can be configured for FDL or DS0 operation.
The DS21Q42 is a superset of the DS21Q41 Quad T1 framer, providing four fully independent framing transceivers that can operate on asynchronous backplanes up to 8.192 MHz. Each framer includes dual two‑frame elastic store slip buffers, an 8‑bit parallel control port, and programmable output clocks for fractional T1 rates.
Key features include a full HDLC controller with 64‑byte buffers, per‑channel code insertion and loopback, IEEE 1149.1 (JTAG) support, and pin compatibility with the DS21Q44 Enhanced Quad E1 framer. The device operates from a 3.3 V supply with 5 V‑tolerant I/O and is offered in a 128‑pin TQFP package.
| Framing transceivers | Four T1 DSIASDN‑PRI/J1 framing transceivers |
|---|---|
| Parallel control port | 8‑bit parallel control port |
| Supply voltage | 3.3 V supply with 5 V tolerant I/O; low‑power CMOS |
| Package | 128‑pin TQFP |
| JTAG support | IEEE 1149.1 (JTAG) support |
| Maximum clock rate | 8.192 MHz |
| Operating temperature range | -40 °C to +85 °C (DS21Q42TN) / 0 °C to 70 °C (DS21Q422T) |
The DS21Q42 contains four fully independent framers.
It uses a 3.3 V supply with 5 V tolerant I/O.
The device is available in a 128‑pin TQFP package.
The framer can operate with clocks up to 8.192 MHz.