QuickLogic QL8x12 Datasheet


QuickLogic QL8x12 Datasheet - cover page
Brand
QUICKLOGIC
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
8
File format
PDF
File size
477 KB
Published
04 June, 2012
Updated
27 June, 2012
MD5 checksum
AB83284F7568E5A4063821CE64B7166B

About this manual

The QL8x12 is a member of QuickLogic's pASIC 1 family, offering a very‑high‑speed CMOS FPGA with 96 logic cells and up to 3000 total gates. It features metal‑to‑metal ViaLink programmable‑via technology, low standby current, and flexible architecture supporting up to 14‑input gates.

The document includes detailed electrical characteristics, pinout information, timing parameters, and absolute maximum ratings, enabling designers to evaluate the device for high‑performance applications such as fast microprocessor interfaces and custom logic implementations.

What's inside

  • Highlights
  • High Usable Density
  • Low‑Power High‑Output Drive
  • Flexible FPGA Architecture
  • Pinout
  • Absolute Maximum Ratings
  • Operating Range
  • DC Characteristics
  • AC Characteristics
  • Timing Waveforms

Specifications

Logic cells96
Total available gates3000
Typical usable gates1000
Input HIGH voltage (VIH)2.0 V
Input LOW voltage (VIL)0.8 V
Clock‑to‑Q delay (fanout 1)3.0 ns

Frequently asked questions

How many logic cells are in the QL8x12?

The QL8x12 contains 96 logic cells.

What is the maximum operating frequency of the QL8x12?

Chip‑to‑chip operating frequencies can reach up to 85 MHz, with internal state‑machine frequencies up to 100 MHz.

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