QuickLogic QL4016 QuickRAM Datasheet

This data sheet introduces the features of QL4016 QuickRAM ESP, including high performance, high density, high speed embedded SRAM, easy to use and fast development cycle.


QuickLogic QL4016 QuickRAM Datasheet - cover page
Brand
QUICKLOGIC
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
18
File format
PDF
File size
479 KB
Published
07 May, 2012
Updated
01 October, 2023
MD5 checksum
A64009A4CB28AC666129140575D3F094

About this manual

The QL4016 QuickRAM is a 0.35 µm four‑layer metal ESP offering 16 000 usable PLD gates, 320 logic cells and 10 dual‑port RAM modules (1 152 bits each). It supports both 3.3 V and 5.0 V I/O, PCI‑compliant buses and full JTAG boundary‑scan.

Key performance figures include up to 400 MHz datapaths, 300 MHz counters, 160 MHz+ FIFOs and 5 ns access times. The device is available in 84‑pin PLCC, 100‑pin TQFP, 100‑pin CQFP and 144‑pin TOQFP packages, with a supply voltage range of 3.0‑3.6 V and an operating temperature range of –55 °C to +85 °C.

What's inside

  • Device Highlights
  • Architecture Overview
  • Product Summary
  • Electrical Specifications
  • DC Characteristics
  • Absolute Maximum Ratings
  • Operating Range
  • Pinout Table
  • Contact Information
  • Revision History

Specifications

Usable PLD Gates16,000
I/O Pins118
Logic Cells320
Dual‑Port RAM Modules10
RAM Bits per Module1,152
Maximum Datapath Speed400 MHz
Access Time5 ns
Supply Voltage Range3.0 V – 3.6 V

Frequently asked questions

How many I/O pins does the QL4016 have?

The QL4016 provides a total of 118 I/O pins.

What is the maximum datapath speed of the QL4016?

The device supports datapaths up to 400 MHz.

What is the access time for the embedded RAM?

The embedded RAM has an access time of 5 ns per port.

How many usable PLD gates are available in the QL4016?

The QL4016 contains 16 000 usable PLD gates.

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