PhaseLink PL560-xx Analog Frequency Multiplier Datasheet

PhaseLink’s Analog Frequency MultiplierTM (AFM) is the industry’s first ‘Balanced Oscillator’ utilizing analog multiplication of the fundamental frequency (at double or quadruple frequency), combined with an attenuation of the fundamental of the reference crystal, without the use of a phase-locked loop (PLL), in CMOS technology. PhaseLink’s patent pending PL560-xx family of AFM products can achieve up to 800 MHz output frequency with little jitter or phase noise deterioration. In addition, the low frequency input crystal requirement makes the AFMs the most affordable high-performance timing-source in the market. PL560-xx family of products utilize low-power CMOS technology and are housed in GREEN/ RoHS compliant 16-pin TSSOP, and 16-pin 3x3 QFN packages.


PhaseLink PL560-xx Analog Frequency Multiplier Datasheet - cover page
Brand
PLL
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
15
File format
PDF
File size
881 KB
Published
07 May, 2012
Updated
01 October, 2023
MD5 checksum
43EFF8CDCB70A91BB180CA56BBF47381

About this manual

The PhaseLink PL560-xx VCXO family provides non‑PLL analog frequency multiplication from 30 MHz up to 200 MHz input, delivering output frequencies between 60 MHz and 800 MHz with ultra‑low jitter and phase noise. The devices are offered in RoHS‑compliant 16‑pin TSSOP and 3 × 3 mm QFN packages and support differential PECL, LVDS or single‑ended CMOS outputs.

The document includes product features, block diagrams, selection guides, crystal and board‑layout recommendations, voltage‑control specifications, external component values, package dimensions and ordering codes. It also describes the tuning assistant software for optimizing inductors and capacitors in custom layouts.

What's inside

  • Product Description
  • Features
  • Block Diagram
  • Product Selection Guide
  • Crystal Specifications and Board Layout Considerations
  • Voltage Control Specification
  • External Component Values
  • Determining Stray L and C in a Layout
  • Package Information
  • Ordering Information

Specifications

Input frequency range30‑200 MHz
Output frequency range60‑800 MHz
RMS phase jitter< 0.25 ps (12 kHz‑20 MHz)
RMS period jitter< 2.5 ps
Phase noise at 100 kHz offset-142 dBc/Hz (155.52 MHz carrier)
Pullability±120 ppm
Supply voltage2.5 V or 3.3 V ±10 %
Operating temperature range-40 °C to +85 °C (optional industrial)
Package types16‑pin TSSOP, 16‑pin 3 × 3 mm QFN

Frequently asked questions

What input frequency range does the PL560-xx family support?

The PL560-xx VCXO family accepts input frequencies from 30 MHz to 200 MHz.

What is the maximum output frequency of the PL560-xx devices?

They can generate output frequencies up to 800 MHz.

How low is the phase jitter of the PL560-xx multipliers?

RMS phase jitter is less than 0.25 ps over the 12 kHz‑20 MHz range.

What package options are available for the PL560-xx family?

The devices are offered in RoHS‑compliant 16‑pin TSSOP and 16‑pin 3 × 3 mm QFN packages.

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