The ADAU1361 is a stereo, low power, 96 kHz, 24-bit audio codec with integrated PLL that supports single-ended and differential inputs, an internal microphone bias reference voltage, I2C and SPI control interfaces, and digital audio serial data I/O.
The ADAU1361 is a low‑power, stereo audio codec that supports 24‑bit ADC and DAC operation with up to 98 dB SNR. It offers six configurable analog inputs, a stereo digital microphone input, multiple analog outputs, and both I²C and SPI control interfaces. Integrated PLL and flexible clock generation allow sampling rates from 8 kHz to 96 kHz.
The datasheet provides detailed electrical specifications, typical current consumption, pin configurations, and timing diagrams. It also includes an ordering guide, package dimensions, and application notes for smartphones, cameras and portable media players.
| ADC Resolution | 24 Bits |
|---|---|
| Digital Attenuation Step | 0.375 dB |
| Supply Voltage (AVDD) | 1.8 V – 3.65 V |
| Record Power Consumption | 7 mW (48 kHz, 1.8 V) |
| Supported Sampling Rates | 8 kHz – 96 kHz |
| Analog Input Pins | 6 (single‑ended or differential) |
The device is rated for –40 °C to +85 °C operating temperature range.
It supports sampling rates from 8 kHz up to 96 kHz.
The codec provides six analog input pins that can be configured as single‑ended or differential.
AVDD may be supplied between 1.8 V and 3.65 V (typical values 1.8 V, 3.3 V).