LSILOGIC 80225 10/100 MbpsTX/10BT Ethernet Physical Layer Device (PHY) Manual

The 80225 is a highly integrated analog interface IC for twisted pair Ethernet applications. It supports 100Base-TX and 10Base-T Ethernet operation, and features automatic configuration and various user options.


LSILOGIC 80225 10/100 MbpsTX/10BT Ethernet Physical Layer Device (PHY) Manual - cover page
Brand
LSILOGIC
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
69
File format
PDF
File size
716 KB
Published
16 February, 2012
Updated
28 September, 2023
MD5 checksum
40154ACBD40494950C0729E5C2DABE24

About this manual

The 80225 Ethernet Physical Layer Device (PHY) provides a single‑chip solution for 10/100 Mbps Ethernet applications. It supports dual‑speed operation, half‑ and full‑duplex modes, auto‑negotiation, and includes on‑chip wave shaping, equalizer, and baseline wander correction, eliminating the need for external filters.

The device is supplied in a 44‑pin plastic leaded chip carrier (PLCC) and operates from a 3.3 V supply with 5 V‑tolerant I/O. Pin functions include LED status indicators, management interface (MI), and optional repeater control. Detailed pin descriptions, functional blocks, and mechanical dimensions are provided in the document.

What's inside

  • Features
  • Description
  • Pin Configuration
  • Pin Description
  • Block Diagram
  • Functional Description
  • Revision History
  • Surface Mount Packages

Specifications

Supply Voltage3.3 V (+5 % tolerance)
Interface Speed10/100 Mbps, half/full duplex
Package44‑pin PLCC
LED OutputsLink, Activity, Collision, Full Duplex, 10/100
Auto‑Negotiation ControlEnabled via ANEG pin

Frequently asked questions

How many pins does the 80225 have and what package is used?

The device is provided in a 44‑pin plastic leaded chip carrier (PLCC) package.

How is auto‑negotiation enabled on the 80225?

Auto‑negotiation is enabled by setting the ANEG pin high.

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