Wolfson WM9714L AC'97 Audio CODEC Datasheet

WM9714L is a highly integrated input/output device designed for mobile computing and communications.


Wolfson WM9714L AC'97 Audio CODEC Datasheet - cover page
Brand
WolfVision
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
119
File format
PDF
File size
1 MB
Published
13 December, 2011
Updated
30 September, 2023
Model
WM9714L
MD5 checksum
47FA8CA081DDBB015BBD6C064B4CAF3E

About this manual

The WM9714L is a highly integrated AC'97 audio CODEC designed for mobile computing and communications. It supports dual stereo CODEC operation, an auxiliary DAC for tones, and a PCM voice interface, all accessed through a single AC‑Link interface.

The document provides a full description of the device, pin configuration, ordering information, absolute maximum ratings, recommended operating conditions, electrical characteristics, audio input/output performance, and mechanical package dimensions.

What's inside

  • Description
  • Features
  • Applications
  • Block Diagram
  • Pin Configuration
  • Ordering Information
  • Electrical Characteristics
  • Audio Outputs
  • Audio Inputs
  • Package Dimensions

Specifications

Supply voltage range (digital/analogue)1.8 V to 3.6 V
Speaker supply voltage rangeup to 4.2 V
DAC Signal‑to‑Noise Ratio94 dB
ADC Signal‑to‑Noise Ratio87 dB
Speaker output power (1 % THD)400 mW RMS
Package type48‑lead QFN
Package dimensions7 × 7 × 0.9 mm
PLL input clock range2.048 MHz to 78.6 MHz

Frequently asked questions

What supply voltage range does the WM9714L support?

The device operates from 1.8 V to 3.6 V for its digital and analogue supplies, and the speaker supply can be as high as 4.2 V.

What package does the WM9714L use and what are its dimensions?

It is offered in a 48‑lead QFN package measuring 7 × 7 mm with a height of 0.9 mm.

What are the audio performance specifications of the DAC?

The DAC provides a signal‑to‑noise ratio of 94 dB and total harmonic distortion of –85 dB.

What input clock frequencies can the PLL accept?

The PLL can accept input clocks ranging from 2.048 MHz up to 78.6 MHz.

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