This document describes the features and functionality of the DS2153Q E1 single-chip transceiver, including complete E1 (CEPT) PCM-30/ISDN-PRI transceiver functionality, on-board line interface for clock/data recovery and waveshaping, jitter attenuator, line build-outs for 120Ω and 75Ω lines, frame formats, dual on-board two-frame elastic store slip buffers, control port, CAS signaling extraction and insertion, detection and generation of remote and AIS alarms, programmable output clocks, fully independent transmit and receive functionality, full access to Si and Sa bits, three separate loopbacks for testing, and large counters.