ANALOG Manuals

AD9552 is a frequency upconverter produced by Analog Devices. It converts a low frequency input reference signal to a high frequency output signal. Input frequencies range from 6.6MHz to 112.5MHz, and output frequencies can reach 900MHz. It has preset pin programmable frequency translation ratios, arbitrary frequency translation ratios via SPI port, on-chip VCO, crystal resonator and/or external oscillator as a reference frequency source, secondary output (either integer-related to the primary output or a copy of the reference input), rms jitter: <0.5ps, SPI-compatible, 3-wire programming interface, single supply (3.3V), low power (under most conditions) <400 mW, and small package size (5mm x 5mm). It can effectively replace high frequency VCXO, OCXO and SAW resonators, and provide low jitter extremely flexible frequency translation for SONET/SDH.

The AD9572 is a fiber channel/Ethernet clock generator IC with 7 clock outputs. The AD9572 uses a fully integrated dual VCO/PLL core, an input crystal or clock frequency of 25 MHz, preset divide ratios for 106.25 MHz, 156.25 MHz, 33.33 MHz, 100 MHz and 125 MHz, a choice of LVPECL or LVDS output format, integrated loop filters, a copy of the reference clock output, rates configured via strapping pins, 3.3 V operation and a 6 mm × 6 mm, 40-lead LFCSP package.

The AD9573 is a PCI-Express clock generator IC with a fully integrated VCO/PLL core, low jitter, and low phase noise. It is suitable for line cards, switches, routers, CPU/PCIe applications, and other applications with demanding phase noise and jitter requirements.

ADCLK846 is a low power clock fanout buffer with selectable LVDS/CMOS outputs. It can provide up to 6 LVDS (1.2 GHz) or 12 CMOS (250 MHz) outputs. Each channel consumes less than 16 mW power and has an integrated jitter of 54 fs (12 kHz to 20 MHz) and additive broadband jitter of 100 fs. It has a propagation delay of 2.0 ns (LVDS), output rise/fall time of 135 ps (LVDS), and output-to-output skew of 65 ps (LVDS). This product is suitable for applications such as low jitter clock distribution, clock and data signal restoration, level translation, wireless communications, wired communications, medical and industrial imaging, ATE, and high performance instrumentation.

The ADCLK854 is a 1.2 GHz/250 MHz LVDS/CMOS fanout buffer optimized for low jitter and low power operation. Possible configurations range from 2 inputs/12 LVDS outputs to 2 inputs/24 CMOS outputs.

The ADCLK905/ADCLK907/ADCLK925 are ultrafast SiGe ECL clock/data buffers. They feature a propagation delay of 95 ps, a toggle rate of 7.5 GHz, a typical output rise/fall time of 60 ps, and a random jitter of 60 fs. They are suitable for clock and data signal restoration and level shifting, automated test equipment (ATE), high-speed instrumentation, high-speed line receivers, and converter clocking applications.

ADCLK914 is a ultrafast, SiGe, Open-Collector HVDS Clock/Data Buffer from Analog Devices. It has a 7.5 GHz operating frequency, 160 ps propagation delay, 100 ps output rise/fall time, 110 fs random jitter, On-chip input terminations, Extended industrial temperature range:-40°C to +125°C, 3.3 V power supply (VCC-VEE) etc. ADCLK914 is widely used in clock and data signal restoration, high speed converter clocking, broadband communications, cellular infrastructure, high speed line receivers, ATE and high performance instruments etc.

The ADCLK946 is an ultrafast clock fanout buffer designed for high-speed applications requiring low jitter. It is fabricated on Analog Devices' proprietary XFCB3 silicon germanium (SiGe) bipolar process. The device operates at a frequency of 4.8 GHz and has a broadband random jitter of 75 fs rms. It supports various input types and can be used in clock distribution, signal restoration, level translation, wireless and wired communications, medical and industrial imaging, ATE, and high-performance instrumentation.

ADCLK948 is a SiGe clock fanout buffer with 2 selectable differential inputs and 8 LVPECL outputs. It operates at a frequency of 4.8 GHz and has a broadband random jitter of 75 fs rms. The product also features on-chip input terminations and a 3.3V power supply.

The document describes the features and characteristics of SiGe Clock Fanout Buffer ADCLK950 Rev. A, including 2 selectable inputs and 10 LVPECL outputs, operating frequency of 4.8 GHz, 75 fs rms broadband random jitter, on-chip input terminations. It is suitable for applications such as low jitter clock distribution, clock and data signal restoration, level translation, wireless communications, wired communications, medical and industrial imaging, ATE and high performance instrumentation.

ADCLK954 Rev. B is a low jitter clock fanout buffer, which features 2 selectable differential inputs, 12 LVPECL outputs, 4.8 GHz operating frequency, 75 fs rms broadband random jitter, and 3.3 V power supply.

The ADF5000 is a low-noise, low-power, fixed RF divider block that can be used to divide frequencies as high as 18 GHz by 2 to produce a lower frequency suitable for input to a PLL IC, such as the ADF4156 or the ADF4106.

The ADF5002 is a low noise, low power, fixed RF divider block that can be used to divide down frequencies as high as 18 GHz to a lower frequency suitable for input to a PLL IC, such as the ADF4156 or the ADF4106.

The ADF5001 is a low noise, low power, fixed RF divider that can divide frequencies as high as 18 GHz to a lower frequency suitable for input into a PLL IC, such as the ADF4156 or ADF4106. The ADF5001 provides a divide-by-4 function and operates off a 3.3 V supply with differential 100Ω RF outputs.