ANALOG Manuals

The ADN2805 is a clock and data recovery IC that provides receiver functions for 1.25 Gbps. It features locking to 1.25 Gbps NRZ serial data input, no reference clock required, loss-of-lock indicator, I2C interface, single-supply operation, low power, etc.

The ADN2806 is a receiver that provides clock and data recovery for 622 Mbps NRZ data. It exceeds SONET requirements for jitter transfer/generation/tolerance, does not require an external reference clock, has a loss-of-lock indicator, and has an I2C interface for accessing optional features. It operates on a single supply voltage and has low power consumption.

This datasheet provides detailed information on the 155/622 Mb/s clock and data recovery IC ADN2807, including features, applications, technical specifications, and dimensions.

ADN2811 Rev. B is an OC-48/OC-48 FEC Clock and Data Recovery IC with Integrated Limiting Amp launched by Analog Devices. It meets SONET requirements.

ADN2812 is a continuous rate 12.3 Mb/s to 2.7 Gb/s clock and data recovery IC with integrated limiting amp

Continuous Rate 10 Mb/s to 1.25 Gb/s Clock and Data Recovery IC with Integrated Limiting Amp

ADN2814 is a clock and data recovery IC from Analog Devices that supports 10 Mb/s to 675 Mb/s continuous rates and integrates a limiting amplifier.

ADN2815 is a clock and data recovery IC that achieves continuous data rates from 10 Mb/s to 1.25 Gb/s. The chip integrates quantization, clock recovery, and data recovery functions, and does not require an external reference clock, and can automatically lock to all data rates.

This document is a datasheet for ADN2817/ADN2818 Continuous Rate 10 Mbps to 2.7 Gbps Clock and Data Recovery ICs. The product features an integrated limiting amplifier, adjustable slice level, patented dual-loop clock recovery architecture, programmable loss of lock detection, integrated PRBS generator and detector, and more.

ADN2819 is a high performance multirate clock and data recovery IC with integrated limiting amp, supporting up to 2.7Gb/s bandwidth.

The ADN2855 is a burst mode clock and data recovery IC designed for GPON/BPON/GEPON optical line terminal (OLT) receiver applications. The device can operate at 155.52 Mbps, 622.08 Mbps, 1244.16 Mbps or 1250.00 Mbps serial data input. It features 12-bit acquisition time, 4-bit parallel LVDS output interface, patented dual-loop clock recovery architecture, integrated PRBS generator, byte rate reference clock, loss-of-lock indicator, supports double data rate (DDR)-compatible FPGA I2C interface to access optional features and single-supply operation (3.3 V).

The AD9510 is a 1.2 GHz clock distribution IC with a PLL core, dividers, delay adjust, and eight outputs. It features low phase noise, programmable dual-modulus prescaler, programmable charge pump, separate CP supply, two 1.6 GHz differential clock inputs, 8 programmable dividers, phase select for output-to-output coarse delay adjust, 4 independent 1.2 GHz LVPECL outputs, additive output jitter of 225 fs rms, 4 independent 800 MHz/250 MHz LVDS/CMOS clock outputs, additive output jitter of 275 fs rms, fine delay adjust on 2 LVDS/CMOS outputs, and a serial control port. The AD9510 is suitable for low jitter, low phase noise clock distribution and high-speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs, and other applications.

The document introduces AD9513 Rev. 0, an 800 MHz clock distribution integrated circuit with dividers, delay adjust, and three outputs. It is suitable for low jitter, low phase noise clock distribution and can be used in applications such as high-speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs, high-performance wireless transceivers, high-performance instrumentation, and broadband infrastructure.

The AD9514 is a 1.6GHz clock distribution IC that includes 3 programmable dividers, delay adjustment, and three outputs.