This manual details the microarchitecture, instruction set, memory management, cache organization, and control registers for the Loongson 2E processor.
The document serves as a comprehensive user manual for the Loongson 2E processor. It covers the processor's microarchitecture, including instruction fetching, branch prediction, register renaming, and execution pipelines.
Key technical areas addressed include memory management systems such as TLBs and address spaces, cache organization and consistency protocols, CP0 control registers, exception handling mechanisms, floating-point unit operations, and privileged instructions for system configuration. This manual is written in Chinese.
| Document Title | Loongson 2E Processor User Manual |
|---|---|
| Manufacturer/Institution | Chinese Academy of Sciences Institute of Computing Technology / STMicroelectronics |
| Publication Date | September 2006 |
It is a microprocessor developed by the Institute of Computing Technology, Chinese Academy of Sciences and STMicroelectronics.
It multiplies the value in floating-point register ft by the value in fs, then adds the result to the value in fd.