This user manual describes the HS‑EVBW5100S/STM32F103Z evaluation board, its hardware components, software configuration, and network connection procedures.
The HS‑EVBW5100S/STM32F103Z evaluation board consists of a universal mother board, a CPU board based on the STM32F103Z 32‑bit Cortex‑M3 MCU (72 MHz), and a network module supporting W5100S and W6100 chips. The board provides interfaces for CPU module, network module, RS‑232C and power.
The manual explains how to set the board into ISP boot mode, configure the default TCP/UDP software examples, adjust network parameters (IP, gateway, subnet, socket ports), and verify connectivity using ping or the WIZnet AX1 test software. Detailed steps for TCP Server, TCP Client, and UDP tests are included. This manual is written in Chinese.
| CPU | STM32F103Z 32‑bit Cortex‑M3 MCU, 72 MHz |
|---|---|
| Network module | Supports W5100S and W6100, SPI and indirect bus |
| Default IP address | 192.168.0.20 |
| Gateway IP | 192.168.0.1 |
| Subnet mask | 255.255.255.0 |
| Socket 0 port | 5000 |
Use the Windows ping command with the board’s IP address (e.g., ping 192.168.0.20); a successful reply indicates normal network operation.
It sends a defined amount of data from the PC to the board, the board returns the data, and the PC compares the returned data with the sent data to confirm correct communication.
The board uses IP address 192.168.0.20, gateway 192.168.0.1, subnet mask 255.255.255.0, and socket 0 port 5000 for TCP/UDP examples.