This document introduces the features and characteristics of Allwinner R16.
This document provides detailed technical information for the Allwinner R16 quad-core IoT solution. It includes platform introductions, system features, peripheral descriptions, and register details for components like CPU, timer, PWM, DMA, RTC, and audio codec. The manual is intended for developers and engineers implementing or debugging the R16 platform.
The document is structured into chapters covering system architecture, boot process, CPU configuration, timers, interrupts, and various subsystems including display, video, and audio. It includes block diagrams, register lists, and descriptions for each module, with revision history indicating updates to features like audio SNR and thermal sensor clock timing.
| CPU Architecture | ARM |
|---|---|
| Release Date | Jan 05, 2016 |
| Revision | 1.2 |
The R16 uses ARM CPU architecture.
The manual was released on January 5, 2016.
Revision 1.2 modified audio codec SNR, thermal sensor clock and ADC conversion time, CSI block diagram, and TCON overview.