ST 74LCX573 handbook

The 74LCX573 is a low voltage CMOS octal D-type latch with 3-state non-inverting output fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power and high speed 3.3V applications; it can be interfaced to 5V signal environment for both inputs and outputs. These 8 bit D-Type latch are controlled by a latch enable input (LE) and an output enable input (OE). While the LE inputs is held at a high level, the Q outputs will follow the data input. When the LE is taken low, the Q outputs will be latched at the logic level of D input data. While the (OE) input is low, the 8 outputs will be in a normal logic state (high or low logic level) and while (OE) is in high level, the outputs will be in a high impedance state. It has same speed performance at 3.3V than 5V AC/ACT family, combined with a lower power consumption. All inputs and outputs are equipped with protection circuits against static discharge.


Brand
STMicroelectronics
File format
PDF
Published
10 August, 2012
Updated
30 September, 2023
MD5 checksum
6287825A4B33CA44D1A9A17AA725395D
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