STMicroelectronics STi5118 Data Brief

Low-cost interactive FTA set-top box decoder with ST20 32-bit VL-RISC CPU, unified memory interface, programmable flash memory interface, programmable transport interface (PTI), MPEG-2 MP@ML video decoder, advanced blitter base compositor, PAL/NTSC/SECAM encoder, audio subsystem, central DMA controller and on-chip peripherals


STMicroelectronics STi5118 Data Brief - cover page
Brand
STMicroelectronics
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
5
File format
PDF
File size
67 KB
Published
08 August, 2012
Updated
30 September, 2023
MD5 checksum
14E01B57752144AA42C80CC578A416B4

About this manual

The STi5118 is a highly integrated single-chip MPEG-2 set-top-box decoder designed for mass-market Free-to-Air (FTA) applications. It sets a new standard for performance and price by combining an enhanced ST20 32-bit VL-RISC CPU running at 200 MHz with a unified memory interface and advanced graphics capabilities. The device supports DVB transport streams and offers hardware and software binary compatibility with the STi5105, allowing for a unified platform for manufacturers.

What's inside

  • Features
  • Description
  • Ordering information
  • Revision history
  • Legal notices

Specifications

CPUST20 32-bit VL-RISC CPU – 200 MHz
Memory InterfaceUp to 166 MHz, 16-bit wide SDRAM
Video DecoderMPEG-2 MP@ML video decoder
Graphics8 bpp CLUT graphics, 256 x 30 bits (AYCbCr) CLUT entries
AudioMPEG-1 layers I/II
Ordering CodeSTi5118ALC

Frequently asked questions

What is the STi5118?

The STi5118 is a low-cost interactive FTA set-top box decoder.

What is the clock speed of the CPU?

The ST20 32-bit VL-RISC CPU operates at a clock speed of 200 MHz.

What are the dimensions and package type?

The device comes in a 24 mm x 24 mm LQFP216 package.

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