This document describes a technique to lower total harmonic distortion (THD) in Junction Field-Effect Transistor (JFET) operational amplifiers when operated from high source impedances. The distortion arises from the nonlinear behavior of the parasitic capacitance between the FET terminals and the IC substrate. The note details a circuit method using a buffer amplifier and a feedback divider to drive the substrate with a signal equal to the input, effectively minimizing the voltage across the input capacitance.
This is caused by a phenomenon of distortion increase with increasing input signal rate-of-change, due to nonlinearity of the capacitance seen at the two inputs.
Distortion begins to be easily detectable at audio frequencies when the source impedance is 50k or greater.
It reduces distortion by driving the U1 substrate with a signal equal to that at the (+) input, which reduces the voltage across the input capacitance.