This document is a data book for the TM5400/TM5600 processor, including the features and characteristics of the product.
This document details the electrical, mechanical, and functional specifications of the Transmeta Crusoe™ Processor Model TM5400/TM5600. It covers interfaces including DDR and SDR SDRAM, PCI, power management, and thermal monitoring. The processor supports operating frequencies of 500, 533, 600, and 667 MHz, with integrated L1 and L2 caches. It is designed for mobile applications with low power consumption and ACPI-compliant power management. The document includes pin descriptions, timing specifications, package dimensions, and thermal diode details.
| Operating Frequencies | 500, 533, 600, and 667 MHz |
|---|---|
| L2 Cache Size | 256 kByte (TM5400) or 512 kByte (TM5600) |
| DDR SDRAM Interface | 100-133 MHz, 2.5V |
| SDR SDRAM Interface | 66-133 MHz, 3.3V |
| Power Consumption | 0.7-2.5 W @ 500-667 MHz, 1.2-1.6V |
| Deep Sleep Power | 100 mW |
| Package Type | 474-pin ceramic BGA |
The processor operates at 500, 533, 600, and 667 MHz.
TM5400 has 256 kByte L2 cache, and TM5600 has 512 kByte L2 cache.
The power consumption in deep sleep mode is 100 mW.
The package type is a 474-pin ceramic BGA.