Intersil HCTS86MS Radiation Hardened Quad XOR Gate Datasheet

This document is the datasheet of Intersil HCTS86MS Radiation Hardened Quad 2-Input Exclusive OR Gate.


Intersil HCTS86MS Radiation Hardened Quad XOR Gate Datasheet - cover page
Brand
inter‘sil
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
9
File format
PDF
File size
149 KB
Published
11 June, 2012
Updated
30 September, 2023
MD5 checksum
BF217155B76FB8D09D1AB815F05295F3

About this manual

The Intersil HCTS86MS is a Radiation Hardened Quad 2-Input Exclusive OR Gate utilizing advanced CMOS/SOS technology. It is designed for high-speed operation within the radiation hardened, high-speed, CMOS/SOS Logic Family.

The device operates over a military temperature range of -55°C to +125°C and features significant power reduction compared to LSTTL ICs. It offers Total Dose survivability up to 200K RAD (Si) with Single Event Upset immunity.

What's inside

  • Features
  • Description
  • Pinouts
  • Ordering Information
  • Truth Table
  • Absolute Maximum Ratings
  • Operating Conditions
  • DC Electrical Performance Characteristics
  • AC Electrical Performance Characteristics
  • Burn-In and Operating Life Test

Specifications

Technology+ 3 Micron Radiation Hardened SOS CMOS
Total Dose Survivability>100 MEV-cm²/mg (SEP Effective LET No Upsets)
Single Event Upset Immunity< 2 x 10⁻⁶ Errors/Bit-Day (Typ)
Dose Rate Survivability>1 x 10¹⁰ RAD (Si/s)
Latch-Up Free ConditionUnder Any Conditions
Operating Temperature Range-55°C to +125°C
DC Operating Voltage Range4.5V to 5.5V
Input Low Voltage (Max)0.8V
Input High Voltage (Min)VCC/2

Frequently asked questions

What is the package type for the HCTS86MS?

The device is supplied in a 14 lead Ceramic flatpack (K suffix) or a SBDIP Package (D suffix).

Is the HCTS86MS compatible with LSTTL inputs?

Yes, it has LSTTL input compatibility.

Download PDF (149 KB)