The CY7C1021BV is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption when deselected. Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is written into the location specified on the address pins (A0 through A15). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O9 through I/O16) is written into the location specified on the address pins (A0 through A15). Reading from the device is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If Byte High Enable (BHE)
The document describes the CY7C1021BV33 as a 64K x 16 Static RAM organized as 65,536 words by 16 bits. It features automatic power-down capabilities to reduce consumption when deselected and operates at 3.3V.
| Organization | 65,536 words by 16 bits |
|---|---|
| Operating Voltage | 3.0V to 3.6V |
| Maximum Access Time | 8 ns, 10 ns, 12 ns, or 15 ns |
| Max Active Power (L version) | 576 mW |
| Max Standby Power (L version) | 1.80 mW |
The device operates at 3.3V with a tolerance of 3.0V to 3.6V.
The CY7C1021BV is available in 44-pin TSOP II, 400-mil SOJ, and 48-Ball Mini BGA packages.
Yes, it has an automatic power-down feature that reduces power consumption when deselected.