UMC UM621024C Series 128K x 8 CMOS SRAM Datasheet


UMC UM621024C Series 128K x 8 CMOS SRAM Datasheet - cover page
Brand
UMC
Category
Memory
Document type
Datasheet
Language
English
Pages
16
File format
PDF
File size
701 KB
Published
05 June, 2012
Updated
05 June, 2012
MD5 checksum
6BCC486CC17374CB01B27B07F886BB3D

About this manual

The UM621024C is a low operating current 1,048,576-bit static random access memory organized as 131,072 words by 8 bits. It operates on a single +5V power supply and features fully static operation with no clock or refreshing required. The device includes two chip enable inputs for power down and device enable, along with an output enable input for easy interfacing.

What's inside

  • Features
  • General Description
  • Pin Configurations
  • Block Diagram
  • Absolute Maximum Ratings
  • DC Electrical Characteristics
  • AC Characteristics
  • Timing Waveforms
  • Ordering Information
  • Package Information

Specifications

Memory Capacity128K x 8 bits (1,048,576 bits)
Organization131,072 words x 8 bits
Power Supply Voltage+5V (4.5V to 5.5V)
Operating Temperature Range0°C to +70°C
Operating Current (Standard)100 mA max
Standby Current (Low Power)25 uA max
Available Packages32-pin DIP, SOP, TSOP

Frequently asked questions

What is the memory organization of the UM621024C?

It is organized as 131,072 words by 8 bits.

Does the UM621024C require a clock signal?

No, it features fully static operation with no clock or refreshing required.

What are the available package types for this series?

The device is available in 32-pin DIP, SOP, and TSOP packages.

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