U-Chip UC62LS2048-20/25 Datasheet


U-Chip UC62LS2048-20/25 Datasheet - cover page
Brand
U-CHIP
Category
Memory
Document type
Datasheet
Language
English
Pages
9
File format
PDF
File size
133 KB
Published
01 June, 2012
Updated
01 June, 2012
MD5 checksum
1F76DA037FFC42CD9C617CED58378E0D

About this manual

The UC62LS2048-20/25 is a low‑power CMOS static RAM organized as 131,072 words × 16 bits. It operates from 3.0 V to 3.6 V and offers features such as three‑state TTL‑compatible outputs, automatic power‑down, and data retention down to 1.2 V.

The document provides DC and AC electrical characteristics, timing parameters for read and write cycles, data‑retention behavior, and mechanical details for the TSOP‑II‑44 and 48‑pin mini‑BGA packages. Ordering information and package dimensions are also included.

What's inside

  • Features
  • Product Family
  • Pin Configurations
  • Pin Description
  • Block Diagram
  • DC Electrical Characteristics
  • AC Electrical Characteristics
  • Data Retention Characteristics
  • Switching Waveforms
  • Ordering Information

Specifications

Memory organization131,072 words × 16 bits
Supply voltage3.0 V ~ 3.6 V
Standby current1 µA typ.
Maximum access time25 ns
Operating current (max)20 mA
Package types44‑pin TSOP‑II, 48‑pin mini‑BGA
Industrial temperature range-40 °C ~ 85 °C

Frequently asked questions

What is the operating voltage range of the UC62LS2048?

The device operates from 3.0 V to 3.6 V.

What is the typical standby current?

The typical CMOS standby current is 1 µA.

Which packages are offered for this SRAM?

It is offered in a 44‑pin TSOP‑II package and a 48‑pin mini‑BGA package.

What is the maximum read access time?

The maximum access time is 25 ns at a 3.0 V supply.

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