This manual introduces the Intel MCS-48 microcomputer family, describing the core 8048 chip and its variants (8049, 8021, 8035, 8039, etc.). It covers the architecture, instruction set, and optional peripherals such as I/O expanders and memory devices.
The document also explains how to develop products based on the MCS-48, detailing power requirements, pin compatibility, and special features like single‑step mode, power‑down standby, and optional clock output.
| CPU width | 8‑bit |
|---|---|
| I/O lines | 27 (8048) or up to 21‑27 depending on variant |
| Timer/Event Counter | 8‑bit |
| Supply voltage | Single 5 V (4.5 V–6.5 V range) |
| Package | 40‑pin DIP (or 28‑pin DIP for some variants) |
| Cycle time | 2.5 µs, 5.0 µs or 10.0 µs |
| Stack depth | 8‑level stack |
| Register banks | 2 working register banks |
The MCS‑48 microcomputers operate from a single 5 V supply (acceptable range 4.5 V to 6.5 V).
The 8048 provides 27 input/output lines.