The document is copyrighted by ICminer.com Electronic-Library Service. It describes the features and characteristics of the ICminer.com Electronic-Library Service.
The GT-32011 is a single‑chip system controller designed to complement IDT’s R3051 family of 32‑bit embedded processors. It provides a tightly coupled CPU interface, DRAM and ROM controllers, parallel and Centronics ports, PCMCIA slots, and an external agent/coprocessor interface, enabling high‑performance data handling with minimal processor overhead.
The device is offered in a 160‑pin QFP package and supports configurable memory sizes, burst transfers, and both little‑ and big‑endian operation. Detailed pin assignments, timing diagrams, and functional blocks are provided for system designers targeting telecommunications, office automation, industrial, and medical instrumentation.
| CPU interface frequency | 16 MHz – 33 MHz |
|---|---|
| Maximum DRAM capacity | 40 MB |
| Maximum ROM capacity | 20 MB |
| DRAM address space | 0 – 40 MB |
| ROM address space per bank | 1 MB, 2 MB, 4 MB or 8 MB (configurable) |
| PCMCIA address space | 256 MB |
| Package type | 160‑pin Quad Flat Package (QFP) |
It supports CPU interface frequencies from 16 MHz up to 33 MHz.
The controller can directly address up to 40 MB of DRAM across up to three non‑interleaved banks.
The ROM controller can handle up to 20 MB of ROM memory.
It is supplied in a 160‑pin Quad Flat Package (QFP).