This is the errata of TLK2201A data sheet, which introduces the PLL startup problem of TLK2201A devices
The TLK2201A Ethernet transceiver can enter a self‑oscillation mode that causes erratic data output and loss of synchronization with the REF_CLK input. The issue occurs when the REF_CLK signal is unstable (missing or double pulses) and the ENABLE pin is toggled, combined with certain supply voltage and temperature conditions.
To avoid the problem, power the device after the oscillator is stable and avoid using the ENABLE pin. If the device enters the failure mode, power‑cycle the PLL or reset it with a short ENABLE low pulse (~1 µs). The TLK2201B part does not exhibit this issue and can be used as a drop‑in replacement.
| Observed oscillation frequencies | 20 – 58 MHz |
|---|---|
| Enable pin reset pulse duration | ~1 µs |
The TLK2201B does not exhibit the self‑oscillation problem and is a drop‑in replacement for the TLK2201A.