Intersil ISL34340 Datasheet

The ISL34340 is a serializer/deserializer of LVCMOS parallel video data. The video data presented to the serializer on the parallel LVCMOS bus is serialized into a high-speed differential signal. This differential signal is converted back to parallel video at the remote end by the deserializer. It also transports auxiliary data bidirectionally over the same link during the video vertical retrace interval.


Intersil ISL34340 Datasheet - cover page
Brand
Intersil
Category
Other Electronics
Document type
Datasheet
Language
English
Pages
10
File format
PDF
File size
180 KB
Published
27 March, 2012
Updated
28 September, 2023
MD5 checksum
3E93F6A27D972E08950F8BD7B172FA4C

About this manual

The ISL34340 is a serializer/deserializer that transports 24‑bit parallel video data over a single high‑speed differential pair while also carrying auxiliary data bidirectionally during the vertical blanking interval. It supports video formats such as SVGA 800×600 @70 fps and WSVGA 1024×600 @60 fps.

The device is supplied in a 64‑lead thin‑plastic quad flat‑pack (EPTQFP) and requires careful PCB layout, power‑supply sequencing, and proper termination to achieve reliable high‑speed operation. The datasheet provides full electrical specifications, pin descriptions, and recommended design practices.

What's inside

  • Features
  • Ordering Information
  • Absolute Maximum Ratings
  • Electrical Specifications
  • Pinout
  • Pin Descriptions
  • Block Diagram
  • Applications
  • Power Supply Sequencing
  • I²C Interface

Specifications

Video transport24‑bit RGB over single differential pair
Operating temperature range-40 °C to +85 °C
Package64‑lead EPTQFP (Q64.10x10B)
Supply voltage VDD_IO3.0 V min / 3.3 V typ / 3.6 V max
Internal termination100 Ω on high‑speed serial lines
Maximum data rate40 MHz PCLK
HS differential output voltage (TXCN=0xFF)1300 mVp‑p

Frequently asked questions

Which pin is used to reset the ISL34340?

Pin 16 (RSTB/PDB) is the reset and power‑down input; it must be forced high for normal operation.

What is the required power‑up sequencing for the supplies?

The 3.3 V supply must be powered before the 1.8 V supply, and REF_CLK must not be applied until the device is fully powered.

Can REF_CLK be applied before power‑up?

No, for the deserializer REF_CLK must not be applied before the device is fully powered up; otherwise a manual reset may be required.

What video data rates does the ISL34340 support?

It supports a 40 MHz pixel clock, enabling SVGA 800×600 at 70 fps and WSVGA 1024×600 at 60 fps.

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