This application note describes the basic principles and design features of low dropout regulators (LDOs) and provides design examples using Analog Devices' LDO product families.
The note introduces low‑dropout regulators (LDOs), describing their architecture, efficiency considerations, and circuit techniques that improve performance. It discusses why dedicated LDOs are still needed in portable systems despite the integration of power‑management ICs.
It then covers LDO use cases for digital, analog and RF loads, defines critical specifications such as dropout voltage, shutdown current, output accuracy, and provides design guidance on soft‑start, enable control, UVLO, thermal shutdown and reverse‑current protection. This manual is written in Chinese.
| Dropout voltage | as low as 80 mV at 2 A load |
|---|---|
| Shutdown current | typically < 1.0 µA |
| Output voltage accuracy | ±1 % at 25 °C |
| Input voltage requirement (example) | must exceed output voltage by at least 150 mV (e.g., > 2.95 V for 2.8 V output) |
| Static (ground) current (I_Q) | low, enabling high efficiency |
| Soft‑start | limits surge current during power‑up |
The dropout can be as low as 80 mV when the load current is 2 A.
The output voltage is trimmed to within ±1 % at 25 °C.
The input voltage must be greater than 2.95 V.