This document introduces the features of infineon SDA 9380 EDDC. The chip is integrated with PLL, and does not require external clock. It can align all deflection parameters by I2C-Bus. It supports PAL, NTSC, HDTV and other formats.
The SDA 9380 is a deflection controller component from Infineon designed for single‑chip back‑end solutions in CRT displays ranging from SDTV to HDTV. It integrates a PLL, on‑chip processing, and supports multiple video standards.
The manual lists key features such as on‑chip PLL (no external clock), YUV/RGB inputs, adjustable video parameters, and protection functions. Technical data include package type, supply voltages, and resolution details, along with a block diagram illustrating signal flow.
| Package | P‑MQFP‑64 |
|---|---|
| Supply voltages | 3.3 V and 8 V |
| DAC resolution | 8‑bit |
| YUV/RGB inputs | Two YUV/RGB inputs and one RGB input |
| Clock source | On‑chip PLL, no external clock required |
The SDA 9380 operates with 3.3 V and 8 V supply voltages.
It provides two YUV/RGB inputs and one RGB input.
No, it includes an on‑chip PLL and does not require an external clock.
The component is supplied in a P‑MQFP‑64 package.