HITACHI Manuals

This document introduces the features and characteristics of 2SC4877, including applications, absolute maximum ratings, and electrical characteristics.

The Hitachi HM628128A is a 131,072-word×8-bit high performance static RAM. It is manufactured with 0.8µm Hi-CMOS process technology and features high speed and low power consumption. The HM628128A is packaged in a 525-mil SOP, 600-mil plastic DIP, or 8×20mm TSOP, suitable for high density mounting.

HA178M00 series 3-terminal fixed voltage regulators have the following features: output current less than 500 mA, various output voltages (5, 6, 7, 8, 9, 12, 15, 18, 20 and 24 V), no external compensation circuit required, built-in current control circuit to protect elements from short circuit damage, built-in chip junction temperature limiting circuit to protect elements from thermal damage, built-in internal power dissipation limiting circuit to protect transistors in output stage.

The HD74LVC125A is a device with four bus buffer gates, suitable for low voltage and high speed operation. Its features include low power consumption, high output current, and high impedance state control.

The document is about requesting and using instructions for the StarBoard BT-2G user's guide. Users are advised to carefully read and understand the safety instructions, and keep the guide for future reference. Additionally, the document includes information about WEEE (Waste Electrical and Electronic Equipment Directive).

Hitachi Feature Tool is a utility that allows the user control over some of the parameters of today’s high performance ATA hard disk drives. The features, which this release of the Feature Tool supports, are, Change Advanced Power Mode, Change Cache Settings, Change the Capacity, Change S.M.A.R.T. Operations, Change Ultra DMA Mode, Show Drive Temperature and Change SATA Settings.

HD74ALVCH16827 is a 20-bit buffer/driver with 3-state outputs. It is composed of two 10-bit sections with separated output enable signals. For either 10-bit buffer section, the two output enable (1OE1 and 1OE2 or 2OE1 and 2OE2) inputs must both be low for the corresponding Y outputs to be active. If either output enable input is high, the outputs of that 10-bit buffer section are in the high impedance state. Active bus hold circuitry is provided to hold unused or floating data inputs at a valid logic level.

The HM62256B series is a 32,768 word × 8 bit high speed CMOS static RAM that utilizes 0.8 µm Hi-CMOS process technology to achieve higher performance and lower power consumption. The device is available in 8 × 14 mm TSOP, 8 × 13.4 mm TSOP with a thickness of 1.2 mm, 450 mil SOP (footprint pitch width), 600 mil plastic DIP, or 300 mil plastic DIP packages for high density mounting. It offers low power standby power dissipation and is therefore suitable for battery back-up systems.

The HD155101BF is an RF single-chip linear IC developed for GSM and EGSM cellular systems. It integrates most of the functions of a transceiver, including the bias circuit for an RF LNA, a 1st mixer, 1st-IF amplifier, 2nd mixer, AGC amplifier, IQ quadrature demodulator for the receiver, and an IQ quadrature modulator and offset PLL for the transmitter. It also includes on-chip dividers for the 1st and 2nd local oscillator signals and a 90° phase splitter, as well as control circuits for power saving modes. The HD155101BF can operate down to 2.7V and is housed in a 48-pin LQFP SMD package. By adding a PLL frequency synthesizer IC, a power amplifier, and some external components, the HD155101BF can be used to create a small-sized transceiver handset for GSM and EGSM. The HD155101BF is fabricated using a 0.6µm double-polysilicon Bi-CMOS process.

The HD74BC244A is an octal buffer/line driver with three-state outputs. It utilizes Bi-CMOS process to provide high drivability and operation equal to or better than high speed bipolar standard logic ICs. The device features low power dissipation, approximately 1/5 of high speed bipolar logic ICs at a frequency of 10 MHz. It has a 20-pin package and is a non-inverting buffer with two active low enables (1G and 2G), each controlling 4 buffers independently.

The HD74ALVCHS162830 is a 1-bit to 2-bit address driver designed for 2.3 V to 3.6 V VCC operation. The driver has a high output current of ±12 mA (@VCC=3.0 V) and can eliminate the need for external pull-up/pull-down resistors on the data inputs. The driver also has diodes to clamp overshoot.

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This manual describes the hardware features of the H8S/2345 F-ZTATTM series chips, suitable for H8S/2345, H8S/2344, H8S/2343, H8S/2341, H8S/2340 chips