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Ericsson PBM 990 08/1MQ ATM Multi Service Chip Datasheet

Datasheet 14 pages · 135 KB · EN

The PBM 990 08/1MQ ATM Multi Service Chip is a low‑power CMOS solution for multi‑service access applications such as ADSL, VDSL, FTTx and HFC. It integrates two ATM Forum 25.6 interfaces, a PCM/E1/T1 telephony service, and a programmable Utopia level‑2 interface for modem/transceiver connectivity. QoS buffering is provided by up to 128 kBytes of external SRAM, and the chip supports ATM signalling, OAM and performance monitoring counters.

The chip offers a generic CPU interface with a 16‑bit bidirectional bus, interrupt signaling, and separate upstream/downstream buffers. Clock requirements include a system clock of 16‑32 MHz, a 32 MHz ATMF clock, and an 8 kHz network reference clock for timing insertion. All functions are hardware‑implemented, allowing high bandwidth handling in both downstream and upstream directions.

Covers: Description · Key Features · Functional description · Data flows · VPI/VCI handling · Operation and Maintenance (OAM) handling

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• Ericsson PBM 990 08/1MQ ATM Multi Service Chip Datasheet

  Datasheet 14 pages · 135 KB · EN

  The Ericsson PBM 990 08/1MQ ATM Multi Service Chip datasheet describes its low‑power CMOS design, interfaces, QoS handling and performance monitoring features.

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