MAXIM Manuals

The MAX12555 is a 3.3V, 14-bit, 95Msps analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts single- ended or differential signals. The MAX12555 is optimized for high dynamic performance, low power, and small size. Excellent dynamic performance is maintained from baseband to input frequencies of 175MHz and beyond, making the MAX12555 ideal for intermediate- frequency (IF) sampling applications. Powered from a single 3.3V supply, the MAX12555 con- sumes only 497mW while delivering a typical 72dB sig- nal-to-noise ratio (SNR) performance at a 175MHz input frequency. In addition to low operating power, the MAX12555 features a 300µW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX12555 to use the internal 2.048V bandgap reference or accept an externally applied reference. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.10V. The MAX12555 provides a com- mon-mode reference to simplify design and reduce exter- nal component count in differential analog input circuits. The MAX12555 supports either a single-ended or differ- ential input clock. Wide variations in the clock duty cycle are compensated with the ADC’s internal duty- cycle equalizer (DCE). ADC conversion results are available through a 14-bit, parallel, CMOS-compatible output b

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The MAX12554 is a 3.3V, 14-bit, 80Msps analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The MAX12554 is optimized for high dynamic performance, low power, and small size. Excellent dynamic performance is maintained from baseband to input frequencies of 175MHz and beyond, making the MAX12554 ideal for intermediate-frequency (IF) sampling applications. Powered from a single 3.3V supply, the MAX12554 consumes only 429mW while delivering a typical 70.9dB signal-to-noise ratio (SNR) performance at a 175MHz input frequency. In addition to low operating power, the MAX12554 features a 300µW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX12554 to use the internal 2.048V bandgap reference or accept an externally applied reference. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.10V. The MAX12554 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits. The MAX12554 supports either a single-ended or differential input clock. Wide variations in the clock duty cycle are compensated with the ADC’s internal duty-cycle equalizer (DCE). ADC conversion results are available through a 14-bit, parallel, CMOS-compatible out

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The MAX19538 is a 3.3V, 12-bit, 95Msps analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input accepts single-ended or differential signals. The MAX19538 is optimized for low power, small size, and high dynamic performance. Excellent dynamic performance is maintained from baseband to input frequencies of 175MHz and beyond, making the MAX19538 ideal for intermediate frequency (IF) sampling applications. Powered from a single 3.3V supply, the MAX19538 consumes only 492mW while delivering a typical 68.4dB signal-to-noise ratio (SNR) performance at a 175MHz input frequency. In addition to low operating power, the MAX19538 features a 63µW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX19538 to use the internal 2.048V bandgap reference or accept an externally applied reference. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.10V. The MAX19538 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits. The MAX19538 supports either a single-ended or differential input clock drive. The internal clock duty-cycle equalizer accepts a wide range of clock duty cycles. Analog-to-digital conversion results are available through a 12-bit, parallel, CMOS-compatible output bus.

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The MAX12527 is a low-power, small-size, 12-bit ADC from MAXIM that features fully differential wideband track-and-hold (T/H) inputs, driving internal quantizers. The MAX12527 is optimized for low power, small size, and high dynamic performance in intermediate frequency (IF) and baseband sampling applications. This dual ADC operates from a single 3.3V supply, consuming only 620mW while delivering a typical 69.8dB signal-to-noise ratio (SNR) performance at a 175MHz input frequency. The T/H input stages accept single-ended or differential inputs up to 400MHz. In addition to low operating power, the MAX12527 features a 166µW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX12527 to use the internal 2.048V bandgap reference or accept an externally applied reference and allows the reference to be shared between the two ADCs. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.15V. The MAX12527 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits. The MAX12527 supports either a single-ended or differential input clock. User-selectable divide-by-two (DIV2) and divide-by-four (DIV4) modes allow for design flexibility and help eliminate the negative effects of clock jitter. Wide variations in the clock duty cycle are compensated with the ADC’s internal duty-cycle equalizer (DCE).

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The MAX12557 is a dual 3.3V, 14-bit analog-to-digital converter (ADC) featuring fully differential wideband track-and-hold (T/H) inputs, driving internal quantizers. The MAX12557 is optimized for low power, small size, and high dynamic performance in intermediate frequency (IF) and baseband sampling applications. This dual ADC operates from a single 3.3V supply, consuming only 610mW while delivering a typical 72.5dB signal-to-noise ratio (SNR) performance at a 175MHz input frequency. The T/H input stages accept single-ended or differential inputs up to 400MHz. In addition to low operating power, the MAX12557 features a 166µW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX12557 to use the internal 2.048V bandgap reference or accept an externally applied reference and allows the reference to be shared between the two ADCs. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.15V. The MAX12557 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits. The MAX12557 supports either a single-ended or differential input clock. User-selectable divide-by-two (DIV2) and divide-by-four (DIV4) modes allow for design flexibility and help eliminate the negative effects of clock jitter. Wide variations in the clock duty cycle are compensated with the ADCs internal duty-cycle equalizer (DCE).

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The MAX1437 is an octal, 12-bit analog-to-digital converter (ADC) from Texas Instruments. It features fully differential inputs, a pipelined architecture and digital error correction that incorporates a fully differential signal path. This ADC is optimized for low power and high dynamic performance in medical imaging instrumentation and digital communications applications. The MAX1437 operates from a 1.8V single supply and consumes only 768mW (96mW per channel) while delivering a 69.9dB (typ) signal-to-noise ratio (SNR) at a 5.3MHz input frequency. In addition to low operating power, the MAX1437 features a power-down mode for idle periods. An internal 1.24V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of an external reference for applications requiring increased accuracy or a different input voltage range. The reference architecture is optimized for low noise. A single-ended clock controls the data-conversion process. An internal duty-cycle equalizer compensates for wide variations in clock duty cycle. An on-chip PLL generates the high-speed serial low-voltage differential signal (LVDS) clock. The MAX1437 has self-aligned serial LVDS outputs for data, clock, and frame-alignment signals. The output data is presented in two’s complement or binary format. The MAX1437 offers a maximum sample rate of 50Msps. See the Pin-Compatible Versions table below for higher- and lower-speed versions. This device is available in a small, 8-lead LFCSP package with an operating temperature range of -40°C to +85°C.

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The MAX1434 is an octal, 10-bit analog-to-digital converter (ADC) with fully differential inputs, a pipelined architecture, and digital error correction incorporating a fully differential signal path. This ADC is optimized for low-power and high-dynamic performance in medical imaging instrumentation and digital communications applications. The MAX1434 operates from a 1.8V single supply and consumes only 767mW (96mW per channel) while delivering a 61dB (typ) signal-to-noise ratio (SNR) at a 5.3MHz input frequency. In addition to low operating power, the MAX1434 features a power-down mode for idle periods. An internal 1.24V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of an external reference for applications requiring increased accuracy or a different input voltage range. The reference architecture is optimized for low noise. A single-ended clock controls the data-conversion process. An internal duty-cycle equalizer compensates for wide variations in clock duty cycle. An on-chip PLL generates the high-speed serial low-voltage differential signal (LVDS) clock. The MAX1434 has self-aligned serial LVDS outputs for data, clock, and frame-alignment signals. The output data is presented in two’s complement or binary format. The MAX1434 offers a maximum sample rate of 50Msps. See the Pin-Compatible Versions table below for 12-bit versions. This device is available in a small, 14mm x 14mm x 1mm package.

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The MAX1214 is a monolithic, 12-bit, 210Msps analog- to-digital converter (ADC) optimized for outstanding dynamic performance at high-IF frequencies up to 300MHz.

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The MAX12528 is a dual 80Msps, 12-bit analog-to-digital converter (ADC) featuring fully differential wideband track-and-hold (T/H) inputs, driving internal quantizers. The MAX12528 is optimized for low power, small size, and high dynamic performance in intermediate frequency (IF) and baseband sampling applications. This dual ADC operates from a single 3.3V supply, consuming only 726mW while delivering a typical 69.8dB signal-to-noise ratio (SNR) performance at a 175MHz input frequency. The T/H input stages accept single-ended or differential inputs up to 400MHz. In addition to low operating power, the MAX12528 features a 330µW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX12528 to use the internal 2.048V bandgap reference or accept an externally applied reference and allows the reference to be shared between the two ADCs. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.15V. The MAX12528 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits. The MAX12528 supports either a single-ended or differential input clock. User-selectable divide-by-two (DIV2) and divide-by-four (DIV4) modes allow for design flexibility and help eliminate the negative effects of clock jitter. Wide variations in the clock duty cycle are compensated with the ADC’s internal duty-cycle equalizer (D

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The MAX1438 is an octal, 12-bit analog-to-digital converter (ADC) with fully differential inputs, a pipelined architecture, and digital error correction incorporating a fully differential signal path. This ADC is optimized for low-power and high-dynamic performance in medical imaging instrumentation and digital communications applications. The MAX1438 operates from a 1.8V single supply and consumes only 913mW (114mW per channel) while delivering a 69.9dB (typ) signal-to-noise ratio (SNR) at a 5.3MHz input frequency. In addition to low operating power, the MAX1438 features a power-down mode for idle periods. An internal 1.24V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of an external reference for applications requiring increased accuracy or a different input voltage range. The reference architecture is optimized for low noise. A single-ended clock controls the data-conversion process. An internal duty-cycle equalizer compensates for wide variations in clock duty cycle. An on-chip PLL generates the high-speed serial low-voltage differential signal (LVDS) clock. The MAX1438 has self-aligned serial LVDS outputs for data, clock, and frame-alignment signals. The output data is presented in two’s complement or binary format. The MAX1438 offers a maximum sample rate of 65Msps. See the Pin-Compatible Versions table below for lower-speed versions. This device is available in a small, 14mm x 14m.

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The MAX19586 is a high-performance, 3.3V, 16-bit analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) and an ultra-low noise floor. The MAX19586 is optimized for multichannel, multimode receivers, which require the ADC to meet very stringent dynamic performance requirements. With a -82dBFS noise floor, the MAX19586 allows for the design of receivers with superior sensitivity requirements. At 80Msps, the MAX19586 achieves a 79.2dB signal-to-noise ratio (SNR) and an 84.3dBc/100dBc single-tone spurious-free dynamic range (SFDR) performance (SFDR1/SFDR2) at fIN = 70MHz. The MAX19586 is not only optimized for excellent dynamic performance in the 2nd Nyquist region, but also for high-IF input fre- quencies. For instance, at 130MHz, the MAX19586 achieves an 82.5dBc SFDR and its SNR performance stays flat (within 2.5dB) throughout the 4th Nyquist region. This level of performance makes the part ideal for high-performance digital receivers. The MAX19586 operates from a 3.3V analog supply voltage and a 1.8V digital voltage, features a 2.56VP-P full-scale input range, and allows for a guaranteed sam- pling speed of up to 80Msps. The input track-and-hold stage operates with a 600MHz full-scale, full-power bandwidth. The MAX19586 features parallel, low-voltage CMOS- compatible outputs in two’s-complement output format. The MAX19586 is manufactured in an 8mm x 8mm, 56-pin thin QFN package with exposed paddle (EP) for low-cost circuit board assembly.

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MAX12558 is a MAXIM 14-bit ADC that features fully differential wideband track-and-hold (T/H) inputs, driving internal quantizers. It is optimized for low power, small size, and high dynamic performance in intermediate frequency (IF) and baseband sampling applications. This dual ADC operates from a single 3.3V supply, consuming only 756mW while delivering a typical 71.7dB signal-to-noise ratio (SNR) performance at a 175MHz input frequency. The T/H input stages accept single-ended or differential inputs up to 400MHz. In addition to low operating power, the MAX12558 features a 330µW power-down mode to conserve power during idle periods.

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The MAX1214N is a monolithic, 12-bit, 210Msps analog-to-digital converter (ADC) optimized for outstanding dynamic performance at high-IF frequencies beyond 300MHz. The product operates with conversion rates up to 210Msps while consuming only 799mW. At 210Msps and an input frequency up to 100MHz, the MAX1214N achieves an 81.3dBc spurious-free dynamic range (SFDR) with excellent 67dB signal-to-noise ratio (SNR) that remains flat (within 2dB) for input tones up to 250MHz. This makes it ideal for wideband applications such as communications receivers, cable-head end receivers, and power-amplifier predistortion in cellular base-station transceivers. The MAX1214N operates from a single 1.8V power supply. The analog input is designed for AC-coupled differential or single-ended operation. The ADC also features a selectable on-chip divide-by-2 clock circuit that accepts clock frequencies as high as 420MHz. A low-voltage differential signal (LVDS) sampling clock is recommended for best performance. The converter provides LVDS-compatible digital outputs with data format selectable to be either two’s complement or offset binary. The MAX1214N is available in a 68-pin QFN package with exposed paddle (EP) and is specified over the industrial (-40°C to +85°C) temperature range. See the Pin-Compatible Versions table for a complete selection of 8-bit, 10-bit, and 12-bit high-speed ADCs in this family.

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The MAX12559 is a dual, 3.3V, 14-bit analog-to-digital converter (ADC) featuring fully differential wideband track-and-hold (T/H) inputs, driving internal quantizers. The MAX12559 is optimized for low power, small size, and high dynamic performance in intermediate frequency (IF) and baseband sampling applications. This dual ADC operates from a single 3.3V supply, consuming only 980mW while delivering a typical 72.2dB signal-to-noise ratio (SNR) performance at a 175MHz input frequency. The T/H input stages accept single-ended or differential inputs up to 350MHz. In addition to low operating power, the MAX12559 features a 0.5mW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX12559 to use the internal 2.048V bandgap reference or accept an externally applied reference and allows the reference to be shared between the two ADCs. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.15V. The MAX12559 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits. The MAX12559 supports either a single-ended or differential input clock. User-selectable divide-by-two (DIV2) and divide-by-four (DIV4) modes allow for design flexibility and help to reduce the negative effects of clock jitter. Wide variations in the clock duty cycle are compensated with the ADC’s internal duty-cycle equalizer (DCE).

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The MAX1436B is a low-power, high-performance analog-to-digital converter (ADC) from TI that features fully differential inputs, a pipelined architecture, and digital error correction incorporating a fully differential signal path. This ADC is optimized for low-power and high-dynamic performance in medical imaging instrumentation and digital communications applications. The MAX1436B operates from a 1.8V sin- gle supply and consumes only 743mW (93mW per channel) while delivering a 69.9dB (typ) signal-to-noise ratio (SNR) at a 5.3MHz input frequency. In addition to low operating power, the MAX1436B features a low- power standby mode for idle periods. An internal 1.24V precision bandgap reference sets the full-scale range of the ADC. A flexible reference struc- ture allows the use of an external reference for applica- tions requiring increased accuracy or a different input voltage range. The reference architecture is optimized for low noise. A single-ended clock controls the data-conversion process. An internal duty-cycle equalizer compensates for wide variations in clock duty cycle. An on-chip PLL generates the high-speed serial low-voltage differential signal (LVDS) clock. The MAX1436B has self-aligned serial LVDS outputs for data, clock, and frame-alignment signals. The output data is presented in two’s complement or binary format. The MAX1436B offers a maximum sample rate of 40Msps. See the Pin-Compatible Versions table below for higher-speed versions. This device is available in a smal

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The MAX19588 is a 3.3V, high-speed, high-performance analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) and a 16-bit converter core. The MAX19588 is optimized for multichannel, multimode receivers, which require the ADC to meet very stringent dynamic performance requirements. With a -82dBFS noise floor, the MAX19588 allows for the design of receivers with supe- rior sensitivity requirements. At 100Msps, the MAX19588 achieves a 79dB signal-to- noise ratio (SNR) and an 82.1dBc/97.7dBc single-tone spurious-free dynamic range performance (SFDR1/ SFDR2) at fIN = 70MHz. The MAX19588 is not only opti- mized for excellent dynamic performance in the 2nd Nyquist region, but also for high-IF input frequencies. For instance, at 130MHz, the MAX19588 achieves an 82.3dBc SFDR and its SNR performance stays flat (within 2.3dB) up to 175MHz. This level of performance makes the part ideal for high-performance digital receivers. The MAX19588 operates from a 3.3V analog supply voltage and a 1.8V digital voltage, features a 2.56VP-P full-scale input range, and allows for a guaranteed sam- pling speed of up to 100Msps. The input track-and-hold stage operates with a 600MHz full-scale, full-power bandwidth. The MAX19588 features parallel, low-voltage CMOS- compatible outputs in two’s-complement output format. The MAX19588 is manufactured in an 8mm x 8mm, 56-pin thin QFN package with exposed paddle (EP) for low thermal resistance, and i

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The MAX1213N is a 12-bit 170Msps analog-to-digital converter that is optimized for outstanding dynamic performance at high-IF frequencies beyond 300MHz. It features low power consumption, high dynamic range, and good linearity.

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MAX109 is a 2.2Gsps, 8-bit analog-to-digital converter (ADC) that enables the accurate digitizing of analog signals with frequencies up to 2.5GHz.

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The MAX19505 is a dual-channel 8-bit ADC with a maximum sample rate of 65Msps. It operates from a 1.8V supply and supports ZIF and IF sampling.

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