MAXIM Manuals

The MAX1183 is a 3V, dual 10-bit analog-to-digital converter (ADC) featuring fully differential wideband track- and-hold (T/H) inputs, driving two pipelined, nine-stage ADCs. The MAX1183 is optimized for low-power, high dynamic performance applications in imaging, instrumen- tation, and digital communication applications. This ADC operates from a single 2.7V to 3.6V supply, consuming only 120mW while delivering a typical signal-to-noise ratio (SNR) of 59.6dB at an input frequency of 20MHz and a sampling rate of 40Msps. The T/H driven input stages incorporate 400MHz (-3dB) input amplifiers. The convert- ers may also be operated with single-ended inputs. In addition to low operating power, the MAX1183 features a 2.8mA sleep mode as well as a 1µA power-down mode to conserve power during idle periods. An internal 2.048V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of this internal or an externally derived reference, if desired for applications requiring increased accuracy or a different input voltage range. The MAX1183 features parallel, CMOS-compatible three-state outputs. The digital output format can be set to two’s complement or straight offset binary through a single control pin. The device provides for a separate output power supply of 1.7V to 3.6V for flexible interfac- ing. The MAX1183 is available in a 7mm ✕ 7mm, 48-pin TQFP package, and is specified for the extended industrial (-40°C to 125°C) temperature range.

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The MAX1195 is a 3V, dual, 8-bit analog-to-digital con- verter (ADC) featuring fully differential wideband track- and-hold (T/H) inputs, driving two ADCs. The MAX1195 is optimized for low-power, small size, and high-dynamic performance for applications in imaging, instrumentation and digital communications. This ADC operates from a single 2.7V to 3.6V supply, consuming only 87mW while delivering a typical signal-to-noise and distortion (SINAD) of 48.5dB at an input frequency of 20MHz and a sam- pling rate of 40Msps. The T/H-driven input stages incor- porate 400MHz (-3dB) input amplifiers. The converters may also be operated with single-ended inputs. In addi- tion to low operating power, the MAX1195 features a 3mA sleep mode as well as a 0.1µA power-down mode to conserve power during idle periods. An internal 2.048V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of this internal or an externally applied reference, if desired, for applications requiring increased accuracy or a different input voltage range. The MAX1195 features parallel, CMOS-compatible three- state outputs. The digital output format can be set to two’s complement or straight offset binary through a single con- trol pin. The device provides for a separate output power supply of 1.7V to 3.6V for flexible interfacing with various logic families. The MAX1195 is available in a 7mm x 7mm, 48-pin TQFP package, and is specified for th

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The MAX1197 is a 3V, dual, 8-bit analog-to-digital converter (ADC) featuring fully differential wideband track-and-hold (T/H) inputs, driving two ADCs. The MAX1197 is optimized for low-power, small size, and high-dynamic performance for applications in imaging, instrumentation, and digital communications. This ADC operates from a single 2.7V to 3.6V supply, consuming only 120mW while delivering a typical signal-to-noise and distortion (SINAD) of 48.5dB at an input frequency of 30MHz and a sampling rate of 60Msps. The T/H-driven input stages incorporate 400MHz (-3dB) input amplifiers. The converters may also be operated with single-ended inputs. In addition to low operating power, the MAX1197 features a 3mA sleep mode as well as a 0.1µA power-down mode to conserve power during idle periods. An internal 2.048V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of this internal or an externally applied reference, if desired, for applications requiring increased accuracy or a different input voltage range. The MAX1197 features parallel, CMOS-compatible three-state outputs. The digital output format can be set to two’s complement or straight offset binary through a single control pin. The device provides for a separate output power supply of 1.7V to 3.6V for flexible interfacing with various logic families. The MAX1197 is available in a 7mm x 7mm, 48-pin TQFP package, and is specified for

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The MAX1198 is a 3.3V, dual, 8-bit analog-to-digital converter (ADC) featuring fully differential wideband track- and-hold (T/H) inputs, driving two ADCs. The MAX1198 is optimized for low power, small size, and high-dynamic performance for applications in imaging, instrumenta- tion, and digital communications. This ADC operates from a single 2.7V to 3.6V supply, consuming only 264mW, while delivering a typical signal-to-noise and distortion (SINAD) of 48.1dB at an input frequency of 50MHz and a sampling rate of 100Msps. The T/H-driven input stages incorporate 400MHz (-3dB) input ampli- fiers. The converters may also be operated with single- ended inputs. In addition to low operating power, the MAX1198 features a 3.2mA sleep mode, as well as a 0.15µA power-down mode to conserve power during idle periods. An internal 2.048V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of this internal or an externally applied reference, if desired, for applications requiring increased accuracy or a different input voltage range. The MAX1198 features parallel, CMOS-compatible three- state outputs. The digital output format can be set to two’s complement or straight offset binary through a single con- trol pin. The device provides for a separate output power supply of 1.7V to 3.6V for flexible interfacing with various logic families. The MAX1198 is available in a 7mm x 7mm, 48-pin TQFP package, and is specifi- ed for automotive and industrial applications.

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The MAX1190 is a 3.3V, dual 10-bit analog-to-digital con- verter (ADC) featuring fully differential wideband track- and-hold (T/H) inputs, driving two ADCs. The MAX1190 is optimized for low power, small size, and high-dynamic performance for applications in imaging, instrumentation, and digital communications. This ADC operates from a single 3.1V to 3.6V supply, consuming only 492mW while delivering a typical signal-to-noise and distortion (SINAD) of 57dB at an input frequency of 60MHz and a sampling rate of 120Msps. The T/H driven input stages incorporate 400MHz (-3dB) input amplifiers. The converters can also be operated with single-ended inputs. In addition to low operating power, the MAX1190 features a 3mA sleep mode, as well as a 1µA power-down mode to conserve power during idle periods. An internal 2.048V precision bandgap reference sets the full-scale range of the ADC. A flexible reference structure allows the use of this internal or an externally applied ref- erence, if desired, for applications requiring increased accuracy or a different input voltage range. The MAX1190 features parallel, CMOS-compatible three- state outputs. The digital output format can be set to two’s complement or straight offset binary through a single con- trol pin. The device provides for a separate output power supply of 1.7V to 3.6V for flexible interfacing with various logic families. The MAX1190 is available in a 7mm ✕ 7mm, 48-pin TQFP-EP package, and is specified for t

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The MAX1193 is an ultra-low-power, dual, 8-bit, 45Msps analog-to-digital converter (ADC). The device features two fully differential wideband track-and-hold (T/H) inputs. These inputs have a 440MHz bandwidth and accept fully differential or single-ended signals. The MAX1193 delivers a typical signal-to-noise and dis- tortion (SINAD) of 48.5dB at an input frequency of 5.5MHz and a sampling rate of 45Msps while consum- ing only 57mW. This ADC operates from a 2.7V to 3.6V analog power supply. A separate 1.8V to 3.6V supply powers the digital output driver. In addition to ultra-low operating power, the MAX1193 features three power- down modes to conserve power during idle periods. Excellent dynamic performance, ultra-low power, and small size make the MAX1193 ideal for applications in imaging, instrumentation, and digital communications. An internal 1.024V precision bandgap reference sets the full-scale range of the ADC to ±0.512V. A flexible reference structure allows the MAX1193 to use its inter- nal reference or accept an externally applied reference for applications requiring increased accuracy. The MAX1193 features parallel, multiplexed, CMOS- compatible tri-state outputs. The digital output format is offset binary. A separate digital power input accepts a voltage from 1.8V to 3.6V for flexible interfacing to dif- ferent logic levels. The MAX1193 is available in a 5mm × 5mm, 28-pin thin QFN package, and is specified for the extended industrial (-40°C to +

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The MAX1191 is an ultra-low-power, dual, 8-bit, 7.5Msps analog-to-digital converter (ADC). The device features two fully differential wideband track-and-hold (T/H) inputs. These inputs have a 440MHz bandwidth and accept fully differential or single-ended signals. The MAX1191 delivers a typical signal-to-noise and dis- tortion (SINAD) of 48.6dB at an input frequency of 1.875MHz and a sampling rate of 7.5Msps while con- suming only 12mW. This ADC operates from a 2.7V to 3.6V analog power supply. A separate 1.8V to 3.6V supply powers the digital output driver. In addition to ultra-low operating power, the MAX1191 features three power-down modes to conserve power during idle peri- ods. Excellent dynamic performance, ultra-low power, and small size make the MAX1191 ideal for applica- tions in imaging, instrumentation, and digital communi- cations. An internal 1.024V precision bandgap reference sets the full-scale range of the ADC to ±0.512V. A flexible reference structure allows the MAX1191 to use its inter- nal reference or accept an externally applied reference for applications requiring increased accuracy. The MAX1191 features parallel, multiplexed, CMOS- compatible tri-state outputs. The digital output format is offset binary. A separate digital power input accepts a voltage from 1.8V to 3.6V for flexible interfacing to dif- ferent logic levels. The MAX1191 is available in a 5mm × 5mm, 28-pin thin QFN package, and is specified for the extended industrial (-40°C to 85°C) applications.

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The MAX1192 is an ultra-low-power, dual, 8-bit, 22Msps analog-to-digital converter (ADC)

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The MAX1122 is a monolithic 10-bit, 170Msps analog-to-digital converter (ADC) optimized for outstanding dynamic performance at high IF frequencies up to 500MHz. The product operates with conversion rates of up to 170Msps while consuming only 460mW. At 170Msps and an input frequency of 100MHz, the MAX1122 achieves a spurious-free dynamic range (SFDR) of 72dBc. Its excellent signal-to-noise ratio (SNR) of 57.5dB at 10MHz remains flat (within 1dB) for input tones up to 500MHz. This makes the MAX1122 ideal for wideband applications such as digital predistortion in cellular base-station transceiver systems. The MAX1122 requires a single 1.8V supply. The analog input is designed for either differential or single-ended operation and can be AC- or DC-coupled. The ADC also features a selectable on-chip divide-by-2 clock circuit, which allows the user to apply clock frequencies as high as 340MHz. This helps to reduce the phase noise of the input clock source. A differential LVDS sampling clock is recommended for best performance. The converter’s digital outputs are LVDS compatible, and the data format can be selected to be either two’s complement or offset binary. The MAX1122 is available in a 68-pin QFN with exposed pad (EP) and is specified over the industrial (-40°C to +85°C) temperature range. For pin-compatible, higher speed versions of the MAX1122, refer to the MAX1123 (210Msps) and the MAX1124 (250Msps) data sheets.

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The MAX1124 is a monolithic 10-bit, 250Msps analog-to-digital converter (ADC) optimized for outstanding dynamic performance at high IF frequencies up to 500MHz. The product operates with conversion rates of up to 250Msps while consuming only 477mW. At 250Msps and an input frequency of 100MHz, the MAX1124 achieves a spurious-free dynamic range (SFDR) of 71dBc. Its excellent signal-to-noise ratio (SNR) of 57.1dB at 10MHz remains flat (within 1dB) for input tones up to 500MHz. This makes the MAX1124 ideal for wideband applications such as digital predistortion in cellular base-station transceiver systems. The MAX1124 requires a single 1.8V supply. The analog input is designed for either differential or single-ended operation and can be AC- or DC-coupled. The ADC also features a selectable on-chip divide-by-2 clock circuit, which allows the user to apply clock frequencies as high as 500MHz. This helps to reduce the phase noise of the input clock source. A differential LVDS sampling clock is recommended for best performance. The converter’s digital outputs are LVDS compatible, and the data format can be selected to be either two’s complement or offset binary. The MAX1124 is available in a 68-pin QFN with exposed pad (EP) and is specified over the industrial (-40°C to +85°C) temperature range. For pin-compatible, lower speed versions of the MAX1124, refer to the MAX1122 (170Msps) and the MAX1123 (210Msps) data sheets. For a pin-compatible 8-bit version,

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The MAX1123 is a monolithic 10-bit, 210Msps analog-to-digital converter (ADC) optimized for outstanding dynamic performance at high IF frequencies up to 500MHz. The product operates with conversion rates of up to 210Msps while consuming only 460mW. At 210Msps and an input frequency of 100MHz, the MAX1123 achieves a spurious-free dynamic range (SFDR) of 74.5dBc. Its excellent signal-to-noise ratio (SNR) of 57.4dB at 10MHz remains flat (within 1.5dB) for input tones up to 500MHz. This makes the MAX1123 ideal for wideband applications such as digital predistortion in cellular base-station transceiver systems. The MAX1123 requires a single 1.8V supply. The analog input is designed for either differential or single- ended operation and can be AC- or DC-coupled. The ADC also features a selectable on-chip divide-by-2 clock circuit, which allows the user to apply clock frequencies as high as 420MHz. This helps to reduce the phase noise of the input clock source. A differential LVDS sampling clock is recommended for best performance. The converter’s digital outputs are LVDS compatible, and the data format can be selected to be either two’s complement or offset binary. The MAX1123 is available in a 68-pin QFN with exposed pad (EP) and is specified over the industrial (-40°C to +85°C) temperature range. For pin-compatible, lower and higher speed versions of the MAX1123, refer to the MAX1122 (170Msps) and the MAX1124 (250Msps) data sheets. For a higher speed version, refer to the MAX1125 (350Msps) data sheet.

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MAX1121 is an 8-bit, 250Msps analog-to-digital converter (ADC) optimized for outstanding dynamic performance at high IF frequencies up to 500MHz.

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The MAX1127 is a quad, 12-bit analog-to-digital converter (ADC) with fully differential inputs, a pipelined architecture, and digital error correction. This ADC is optimized for low-power, high-dynamic performance for medical imaging, communications, and instrumentation applications. It operates from a 1.7V to 1.9V single supply and consumes only 563mW while delivering a 69.6dB signal-to-noise ratio (SNR) at a 19.3MHz input frequency. In addition to low operating power, it features a 675µA power-down mode for idle periods. An internal 1.24V precision bandgap reference sets the ADC’s full-scale range. A flexible reference structure allows the use of an external reference for applications requiring increased accuracy or a different input voltage range. A single-ended clock controls the conversion process. An internal duty-cycle equalizer allows for wide variations in input-clock duty cycle. An on-chip phase-locked loop (PLL) generates the high-speed serial low-voltage differential signaling (LVDS) clock. The MAX1127 provides serial LVDS outputs for data, clock, and frame alignment signals. The output data is presented in two’s complement or binary format. Refer to the MAX1126 data sheet for a pin-compatible 40Msps version of the MAX1127. It is available in a small, 10mm x 10mm x 0.9mm, 68-pin QFN package with exposed paddle and is specified for the extended industrial (-40°C to +85°C) temperature range.

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The MAX1206 is a 3.3V, 12-bit analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input, driving the internal quantizer. The MAX1206 is optimized for low power, small size, and high dynamic performance. This ADC operates from a single 3.0V to 3.6V supply, consuming only 159mW, while delivering a typical signal-to-noise ratio (SNR) performance of 68.6dB at a 20MHz input frequency. The T/H-driven input stage accepts single-ended or differential inputs. In addition to low operating power, the MAX1206 features a 0.15mW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX1206 to use its internal precision bandgap reference or accept an externally applied reference. A common-mode reference is provided to simplify design and reduce external component count in differential analog input circuits. The MAX1206 supports both a single-ended and differential input clock drive. Wide variations in the clock duty cycle are compensated with the ADC's internal duty-cycle equalizer. The MAX1206 features parallel, CMOS-compatible outputs. The digital output format is pin selectable to be either two's complement or Gray code. A data-valid indicator eliminates external components that are normally required for reliable digital interfacing. A separate power input for the digital outputs accepts a voltage from 1.7V to 3.6V for flexible interfacing with various logic levels.

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The MAX1207 is a 3.3V, 12-bit analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input, driving the internal quantizer. The MAX1207 is optimized for low power, small size, and high dynamic performance. This ADC operates from a single 3.0V to 3.6V supply, consuming only 316mW, while delivering a typical signal-to-noise ratio (SNR) performance of 68.5dB at a 32.5MHz input frequency. The T/H-driven input stage accepts single-ended or differential inputs. In addition to low operating power, the MAX1207 features a 0.15mW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX1207 to use its internal precision bandgap reference or accept an externally applied reference. A common-mode reference is provided to simplify design and reduce external component count in differential analog input circuits. The MAX1207 supports both a single-ended and differential input clock drive. Wide variations in the clock duty cycle are compensated with the ADC’s internal duty-cycle equalizer. The MAX1207 features parallel, CMOS-compatible outputs. The digital output format is pin selectable to be either two’s complement or Gray code. A data-valid indicator eliminates external components that are normally required for reliable digital interfacing. A separate power input for the digital outputs accepts a voltage from 1.7V to 3.6V for flexible interfacing with various logic levels.

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The MAX1213 is a monolithic, 12-bit, 170Msps analog-to-digital converter (ADC) optimized for outstanding dynamic performance at high-IF frequencies up to 300MHz. The product operates with conversion rates up to 170Msps while consuming only 788mW. At 170Msps and an input frequency up to 250MHz, the MAX1213 achieves a spurious-free dynamic range (SFDR) of 72.9dBc. Its excellent signal-to-noise ratio (SNR) of 66.2dB at 10MHz remains flat (within 2dB) for input tones up to 250MHz. This ADC yields an excellent low-noise floor of -68dBFS, which makes it ideal for wideband applications such as cable head-end receivers and power-amplifier predistortion in cellular base-station transceivers. The MAX1213 requires a single 1.8V supply. The analog input is designed for either differential or single-ended operation and can be AC- or DC-coupled. The ADC also features a selectable on-chip divide-by-2 clock circuit, which allows the user to apply clock frequencies as high as 340MHz. This helps to reduce the phase noise of the input clock source. A low-voltage differential signal (LVDS) sampling clock is recommended for best performance. The converter’s digital outputs are LVDS compatible and the data format can be selected to be either two’s complement or offset binary. The MAX1213 is available in a 68-pin QFN package with exposed paddle (EP) and is specified over the industrial (-40°C to +85°C) temperature range. See the Pin-Compatible Versions table for a complete list of part numbers.

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The MAX12553 is a 3.3V, 14-bit, 65Msps analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts single- ended or differential signals. The MAX12553 is optimized for low-power, small size, and high dynamic performance. Excellent dynamic performance is maintained from baseband to input frequencies of 175MHz and beyond, making the MAX12553 ideal for intermediate- frequency (IF) sampling applications. Powered from a single 3.15V to 3.60V supply, the MAX12553 consumes only 363mW while delivering a typical signal-to-noise (SNR) performance of 71dB at an input frequency of 175MHz. In addition to low oper- ating power, the MAX12553 features a 150µW power- down mode to conserve power during idle periods. A flexible reference structure allows the MAX12553 to use the internal 2.048V bandgap reference or accept an externally applied reference. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.10V. The MAX12553 provides a com- mon-mode reference to simplify design and reduce exter- nal component count in differential analog input circuits. The MAX12553 supports both a single-ended and dif- ferential input clock drive. Wide variations in the clock duty cycle are compensated with the ADC’s internal duty-cycle equalizer (DCE). ADC conversion results are available through a 14-bit, parallel, CMOS-com- patible, low-power, high-speed, low-noise output data bus.

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The MAX1209 is a 3.3V, 12-bit, 80Msps analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts single-ended or differential signals. The MAX1209 is optimized for low power, small size, and high dynamic performance. Excellent dynamic performance is maintained from baseband to input frequencies of 175MHz and beyond, making the MAX1209 ideal for intermediate-frequency (IF) sampling applications. Powered from a single 3.0V to 3.6V supply, the MAX1209 consumes only 366mW while delivering a typical signal-to-noise (SNR) performance of 66.5dB at an input frequency of 175MHz. In addition to low operating power, the MAX1209 features a 3µW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX1209 to use the internal 2.048V bandgap reference or accept an externally applied reference. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.15V. The MAX1209 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits. The MAX1209 supports both a single-ended and differential input clock drive. Wide variations in the clock duty cycle are compensated with the ADC’s internal duty-cycle equalizer (DCE). ADC conversion results are available through a 12-bit, parallel, CMOS-compatible output interface.

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The MAX1208 is a 3.3V, 12-bit, 80Msps analog-to-digital converter (ADC) featuring a fully differential wideband track-and-hold (T/H) input amplifier, driving a low-noise internal quantizer. The analog input stage accepts single-ended or differential signals. The MAX1208 is optimized for low power, small size, and high dynamic performance in baseband applications. Powered from a single 3.0V to 3.6V supply, the MAX1208 consumes only 373mW while delivering a typical signal-to-noise (SNR) performance of 68.2dB at an input frequency of 32.5MHz. In addition to low operating power, the MAX1208 features a 3µW power-down mode to conserve power during idle periods. A flexible reference structure allows the MAX1208 to use the internal 2.048V bandgap reference or accept an externally applied reference. The reference structure allows the full-scale analog input range to be adjusted from ±0.35V to ±1.15V. The MAX1208 provides a common-mode reference to simplify design and reduce external component count in differential analog input circuits. The MAX1208 supports both a single-ended and differential input clock drive. Wide variations in the clock duty cycle are compensated with the ADC’s internal duty-cycle equalizer (DCE). ADC conversion results are available through a 12-bit, parallel, CMOS-compatible output bus. The digital output format is pin selectable to be either two’s complement or Gray code. A data-valid indicator eliminates external components that are normally required to indicate when the ADC is in conversion mode.

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