TEXAS INSTRUMENTS CDCLVP110 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER handbook

Update: 30 September, 2023

The CDCLVP110 is a low-voltage 1:10 LVPECL/HSTL with selectable input clock driver. It distributes one differential clock input pair (CLK0, CLK1) to ten pairs of differential LVPECL clock outputs (Q0, Q9) with minimum skew for clock distribution. The CDCLVP110 can accept two clock sources to an input multiplexer. The CLK0 input accepts either LVECL/LVPECL input signals, while CLK1 accepts an HSTL input signal when operated under LVPECL conditions. The CDCLVP110 is specifically designed for driving 50-Ω transmission lines. If single-ended input operation is required, the VBB reference voltage output is used. In this case, the VBB pin should be connected to CLK0 and bypassed to GND via a 10-nF capacitor.

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Publication date: 01 August, 2012

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PDF Link: TEXAS INSTRUMENTS CDCLVP110 LOW-VOLTAGE 1:10 LVPECL/HSTL WITH SELECTABLE INPUT CLOCK DRIVER handbook PDF