Update: 30 September, 2023
Intersil's X28C512, X28C513 are 64K x 8 EEPROMs fabricated with Intersil's proprietary, high performance, floating gate CMOS technology. They feature the JEDEC approved pin out for byte wide memories, compatible with industry standard EPROMS. The X28C512, X28C513 support a 128-byte page write operation, effectively providing a 39µs/byte write cycle and enabling the entire memory to be written in less than 2.5 seconds. The X28C512, X28C513 also feature DATA Polling and Toggle Bit Polling, system software support schemes used to indicate the early completion of a write cycle. In addition, the X28C512, X28C513 support the software data protection option.
File format: PDF
Size: -
MD5 Checksum: 4C003014A76A461BE708E72F7056BB21
Publication date: 28 March, 2012
Downloads: -
PDF Link: intersil X28C512 X28C513 Manual PDF