ATMEL AT89C51AC3 handbook
Update: 29 September, 2023
The document describes a microcontroller product based on the 80C51 core architecture, which features 256 bytes of on-chip RAM, 2048 bytes of on-chip ERAM, and 64K bytes of on-chip flash memory. Additionally, the product includes a boot code section with independent lock bits, 2K bytes of on-chip flash for a bootloader, in-system programming capability through an on-chip UART boot program and IAP, and 2K bytes of on-chip EEPROM. The product also incorporates an integrated power monitor, 14 sources of 4-level interrupts, three 16-bit timers/counters, a full duplex UART compatible with 80C51, a high-speed architecture, five ports, a five-channel 16-bit PCA with PWM, high-speed output, and timer and edge capture functionality. Other features include a double data pointer, a 21-bit watchdog timer, a 10-bit resolution analog to digital converter with 8 multiplexed inputs, SPI interface (PLCC52 and VPFP64 packages only), on-chip emulation logic, and power-saving modes such as idle mode and power-down mode.
Brand: ATMEL
File format: PDF
Size: 1426 KB
MD5 Checksum: 66AE7694365AAB827CAE97A4BF532CEA
Publication date: 27 March, 2012
Downloads: -
PDF Link: ATMEL AT89C51AC3 handbook PDF