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The MM54C195 is MM74C195 CMOS 4-bit registers features parallel inputs, parallel outputs, J-K serial inputs, shift-load control input and a direct overriding clear. The register has two modes of operation, parallel load and shift. Parallel loading is accomplished by applying the four bits of data and taking the shift-load control of input low. The data is loaded into the associated flip-flops and appears at the outputs after the positive transition of the clock input. During parallel loading, serial data flow is inhibited. Serial shifting is accomplished synchronously when the shift-load control input is high. Serial data for this mode is entered at the J-K inputs. These inputs allow the first stage to perform as a J-K, D or T-type flip flop as shown in the truth table.
The MM54C192 and MM74C192 are BCD counters, while the MM54C193 and MM74C193 are binary counters. Both counters support counting from 0 to 9 and can be used to perform addition and subtraction operations, respectively. The counters also have carry and borrow outputs, so they can be cascaded using no external circuitry.
The MM54C08/MM74C08 is a quad 2-input AND gate from National Semiconductor. The circuit uses complementary MOS (CMOS) transistors to achieve wide power supply operating range, low power consumption and high noise margin. It can be used in the design of digital integrated circuit systems.
The MM70C95, MM80C95, MM70C97, and MM80C97 are monolithic complementary MOS (CMOS) integrated circuits constructed with N- and P-channel enhancement mode transistors. They convert CMOS or TTL outputs to TRI-STATE outputs with no logic inversion and provide the logical opposite of the input signal. The MM70C95 and MM80C95 and the MM70C96 and MM80C96 have common TRI-STATE controls for all six devices. The MM70C97 and MM80C97 and the MM70C98 and MM80C98 have two TRI-STATE controls, one for two devices and one for the other four devices. Inputs are protected from damage due to static discharge by diode clamps to VCC and GND. These gates have a wide supply voltage range (3.0V to 15V), guaranteed noise margin (1.0V), high noise immunity (0.45 VCC (typ.)), and TTL compatibility. They can drive 1 TTL load and are used in bus drivers. The typical propagation delay into a 150 pF load is 40 ns.
The ’F161A and ’F163A are high-speed synchronous modu- lo-16 binary counters� They are synchronously presettable for application in programmable dividers and have two types of Count Enable inputs plus a Terminal Count output for versatility in forming synchronous multi-stage counters� The ’F161A has an asynchronous Master-Reset input that over- rides all other inputs and forces the outputs LOW� The ’F163A has a Synchronous Reset input that overrides counting and parallel loading and allows the outputs to be simultaneously reset on the rising edge of the clock� The ’F161A and ’F163A are high-speed versions of the ’F161 and ’F163�
The 54F�74F158A is a high speed quad 2-input multiplexer produced by National Semiconductor Corporation. It uses the common Select and Enable inputs to select four bits of data from two data sources. The four outputs will present the selected data in the inverted form. The device can also generate any four of the 16 different functions of two variables.
The 74F158A is a high speed quad 2-input multiplexer from Fairchild Semiconductor Corporation. It selects four bits of data from two sources using the common Select and Enable inputs. The four outputs present the selected data in the inverted form. The F158A can also generate any four of the 16 different functions of two variables.
This document describes the features and characteristics of the 54F�74F157A Quad 2-Input Multiplexer. It is a high-speed quad 2-input multiplexer that can select four bits of data from two sources and output them in non-inverted form.
The ’F153 is a high-speed dual 4-input multiplexer with common select inputs and individual enable inputs for each section. It can select two lines of data from four sources. The two buffered outputs present data in the true (non-inverted) form. In addition to multiplexer operation, the ’F153 can generate any two functions of three variables.
This document describes the features and characteristics of the TL F9461 54F74F14 hex inverter Schmitt trigger. They are capable of transforming slowly changing input signals into sharply defined, jitter-free output signals, and have a greater noise margin than conventional inverters.
This document describes a triple 3-input AND gate that contains three independent gates, each performing the logic AND function. The product is available in commercial and military packaging for different applications.